Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.2 (WebPack) - P.28xd Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx9
Project ID (random number) ea081235f4e2469da4cf3e33d5a71d61.A23B9F7D8C574C3B9F9FEEE437B4FD7F.3 Target Package: tqg144
Registration ID __0_0_0 Target Speed: -2
Date Generated 2015-02-12T22:05:16 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i5-4670 CPU @ 3.40GHz CPU Speed 3392 MHz
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i5-4670 CPU @ 3.40GHz CPU Speed 3392 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=273
  • 3-bit adder=24
  • 32-bit adder=1
  • 4-bit adder=228
  • 7-bit adder=20
 Comparators=266
  • 3-bit comparator greater=1
  • 32-bit comparator greater=3
  • 4-bit comparator greater=251
  • 4-bit comparator lessequal=10
  • 8-bit comparator greater=1
 Counters=6
  • 2-bit up counter=1
  • 32-bit up counter=4
  • 9-bit up counter=1
 FSMs=2 Multiplexers=1024
  • 1-bit 2-to-1 multiplexer=980
  • 32-bit 2-to-1 multiplexer=6
  • 40-bit 2-to-1 multiplexer=1
  • 8-bit 2-to-1 multiplexer=37
 Registers=70
  • Flip-Flops=70
 		MiscellaneousStatistics
  • AGG_BONDED_IO=13
  • AGG_IO=13
  • AGG_LOCED_IO=13
  • AGG_SLICE=279
  • NUM_BONDED_IOB=13
  • NUM_BSFULL=116
  • NUM_BSLUTONLY=555
  • NUM_BSREGONLY=27
  • NUM_BSUSED=698
  • NUM_BUFG=2
  • NUM_BUFIO2=1
  • NUM_BUFIO2FB=1
  • NUM_DCM=1
  • NUM_LOCED_IOB=13
  • NUM_LOGIC_O5ANDO6=95
  • NUM_LOGIC_O5ONLY=55
  • NUM_LOGIC_O6ONLY=518
  • NUM_LUT_RT_DRIVES_CARRY4=3
  • NUM_LUT_RT_EXO6=3
  • NUM_LUT_RT_O6=55
  • NUM_SLICEL=41
  • NUM_SLICEX=238
  • NUM_SLICE_CARRY4=32
  • NUM_SLICE_CONTROLSET=11
  • NUM_SLICE_CYINIT=827
  • NUM_SLICE_F7MUX=10
  • NUM_SLICE_FF=143
  • NUM_SLICE_UNUSEDCTRL=236
  • NUM_UNUSABLE_FF_BELS=41
 		NetStatistics
  • NumNets_Active=772
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=4
  • NumNodesOfType_Active_BOUNCEIN=110
  • NumNodesOfType_Active_BUFGOUT=2
  • NumNodesOfType_Active_BUFHINP2OUT=8
  • NumNodesOfType_Active_BUFIOINP=2
  • NumNodesOfType_Active_CLKPIN=43
  • NumNodesOfType_Active_CLKPINFEED=16
  • NumNodesOfType_Active_CNTRLPIN=41
  • NumNodesOfType_Active_DOUBLE=1220
  • NumNodesOfType_Active_GENERIC=21
  • NumNodesOfType_Active_GLOBAL=31
  • NumNodesOfType_Active_INPUT=28
  • NumNodesOfType_Active_IOBIN2OUT=14
  • NumNodesOfType_Active_IOBOUTPUT=15
  • NumNodesOfType_Active_LUTINPUT=3323
  • NumNodesOfType_Active_OUTBOUND=811
  • NumNodesOfType_Active_OUTPUT=846
  • NumNodesOfType_Active_PADINPUT=11
  • NumNodesOfType_Active_PADOUTPUT=2
  • NumNodesOfType_Active_PINBOUNCE=308
  • NumNodesOfType_Active_PINFEED=3389
  • NumNodesOfType_Active_PINFEED2=1
  • NumNodesOfType_Active_QUAD=372
  • NumNodesOfType_Active_REGINPUT=49
  • NumNodesOfType_Active_SINGLE=1573
  • NumNodesOfType_Gnd_BOUNCEIN=1
  • NumNodesOfType_Gnd_CNTRLPIN=2
  • NumNodesOfType_Gnd_HGNDOUT=1
  • NumNodesOfType_Gnd_OUTBOUND=1
  • NumNodesOfType_Gnd_OUTPUT=1
  • NumNodesOfType_Gnd_PINBOUNCE=2
  • NumNodesOfType_Gnd_PINFEED=2
  • NumNodesOfType_Gnd_REGINPUT=2
  • NumNodesOfType_Gnd_SINGLE=1
  • NumNodesOfType_Vcc_CLKPIN=1
  • NumNodesOfType_Vcc_CNTRLPIN=1
  • NumNodesOfType_Vcc_HVCCOUT=60
  • NumNodesOfType_Vcc_LUTINPUT=150
  • NumNodesOfType_Vcc_PINFEED=152
 SiteStatistics
  • BUFG-BUFGMUX=2
  • IOB-IOBM=5
  • IOB-IOBS=8
  • SLICEL-SLICEM=22
  • SLICEX-SLICEL=51
  • SLICEX-SLICEM=46
 		SiteSummary
  • BUFG=2
  • BUFG_BUFG=2
  • BUFIO2=1
  • BUFIO2FB=1
  • BUFIO2FB_BUFIO2FB=1
  • BUFIO2_BUFIO2=1
  • CARRY4=32
  • DCM=1
  • DCM_DCM=1
  • FF_SR=1
  • HARD0=3
  • HARD1=3
  • IOB=13
  • IOB_IMUX=2
  • IOB_INBUF=2
  • IOB_OUTBUF=11
  • LUT5=150
  • LUT6=671
  • PAD=13
  • REG_SR=142
  • SELMUX2_1=10
  • SLICEL=41
  • SLICEX=238
 
Configuration Data
BUFIO2FB_BUFIO2FB
  • DIVIDE_BYPASS=[TRUE:1]
  • INVERT_INPUTS=[FALSE:1]
 BUFIO2_BUFIO2
  • DIVIDE=[1:1]
  • DIVIDE_BYPASS=[TRUE:1]
  • I_INVERT=[FALSE:1]
 DCM
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC:1] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:0]
 DCM_DCM
  • CLKDV_DIVIDE=[2.0:1]
  • CLKIN_DIVIDE_BY_2=[FALSE:1]
  • CLKOUT_PHASE_SHIFT=[NONE:1]
  • CLK_FEEDBACK=[1X:1]
  • DESKEW_ADJUST=[5:1]
  • DFS_FREQUENCY_MODE=[LOW:1]
  • DLL_FREQUENCY_MODE=[LOW:1]
  • DSS_MODE=[NONE:1]
  • DUTY_CYCLE_CORRECTION=[TRUE:1]
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC:1] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:0]
  • STARTUP_WAIT=[FALSE:1]
  • VERY_HIGH_FREQUENCY=[FALSE:1]
 FF_SR
  • CK=[CK:1] [CK_INV:0]
  • SRINIT=[SRINIT0:1]
  • SYNC_ATTR=[ASYNC:1]
 IOB_OUTBUF
  • DRIVEATTRBOX=[12:11]
  • SLEW=[SLOW:11]
  • SUSPEND=[3STATE:11]
 REG_SR
  • CK=[CK:142] [CK_INV:0]
  • LATCH_OR_FF=[FF:142]
  • SRINIT=[SRINIT0:141] [SRINIT1:1]
  • SYNC_ATTR=[ASYNC:125] [SYNC:17]
 SLICEL
  • CLK=[CLK:19] [CLK_INV:0]
 SLICEX
  • CLK=[CLK:24] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=2
  • O=2
 BUFG_BUFG
  • I0=2
  • O=2
 BUFIO2
  • DIVCLK=1
  • I=1
 BUFIO2FB
  • I=1
  • O=1
 BUFIO2FB_BUFIO2FB
  • I=1
  • O=1
 BUFIO2_BUFIO2
  • DIVCLK=1
  • I=1
 CARRY4
  • CIN=24
  • CO0=1
  • CO1=2
  • CO2=1
  • CO3=24
  • CYINIT=8
  • DI0=30
  • DI1=28
  • DI2=27
  • DI3=24
  • O0=26
  • O1=25
  • O2=25
  • O3=23
  • S0=32
  • S1=30
  • S2=29
  • S3=26
 DCM
  • CLK0=1
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
 DCM_DCM
  • CLK0=1
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
 FF_SR
  • CE=1
  • CK=1
  • D=1
  • Q=1
 HARD0
  • 0=3
 HARD1
  • 1=3
 IOB
  • I=2
  • O=11
  • PAD=13
 IOB_IMUX
  • I=2
  • OUT=2
 IOB_INBUF
  • OUT=2
  • PAD=2
 IOB_OUTBUF
  • IN=11
  • OUT=11
 LUT5
  • A1=47
  • A2=55
  • A3=52
  • A4=53
  • A5=46
  • O5=150
 LUT6
  • A1=486
  • A2=512
  • A3=531
  • A4=612
  • A5=627
  • A6=665
  • O6=671
 PAD
  • PAD=13
 REG_SR
  • CE=116
  • CK=142
  • D=142
  • Q=142
  • SR=26
 SELMUX2_1
  • 0=10
  • 1=10
  • OUT=10
  • S0=10
 SLICEL
  • A=5
  • A1=9
  • A2=9
  • A3=9
  • A4=28
  • A5=25
  • A6=36
  • AMUX=9
  • AQ=19
  • AX=3
  • B=10
  • B1=11
  • B2=13
  • B3=13
  • B4=31
  • B5=29
  • B6=38
  • BMUX=12
  • BQ=18
  • BX=1
  • C1=8
  • C2=11
  • C3=15
  • C4=32
  • C5=29
  • C6=39
  • CE=15
  • CIN=24
  • CLK=19
  • CMUX=18
  • COUT=24
  • CQ=18
  • CX=12
  • D1=12
  • D2=14
  • D3=14
  • D4=30
  • D5=28
  • D6=34
  • DMUX=6
  • DQ=17
  • DX=1
  • SR=7
 SLICEX
  • A=140
  • A1=135
  • A2=140
  • A3=142
  • A4=143
  • A5=150
  • A6=151
  • AMUX=9
  • AQ=21
  • AX=10
  • B=99
  • B1=92
  • B2=100
  • B3=101
  • B4=102
  • B5=107
  • B6=107
  • BMUX=12
  • BQ=18
  • BX=9
  • C=123
  • C1=119
  • C2=124
  • C3=124
  • C4=125
  • C5=131
  • C6=132
  • CE=18
  • CLK=24
  • CMUX=8
  • CQ=17
  • CX=8
  • D=121
  • D1=115
  • D2=118
  • D3=121
  • D4=121
  • D5=128
  • D6=128
  • DMUX=13
  • DQ=14
  • DX=7
  • SR=1
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
Start 0 0 0 0 0 0 0
_impact 70 49 0 0 0 0 0
bitgen 671 666 0 0 0 0 0
edif2ngd 1 1 0 0 0 0 0
map 798 675 0 0 0 0 0
netgen 9 9 0 0 0 0 0
ngc2edif 2 2 0 0 0 0 0
ngcbuild 9 9 0 0 0 0 0
ngdbuild 855 844 0 0 0 0 0
obngc 9 9 0 0 0 0 0
par 672 670 0 0 0 0 0
trce 647 647 0 0 0 0 0
xst 1277 1174 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/pn_db_nsw_select_ip.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Constraints Editor PROP_intProjectCreationTimestamp=2015-02-12T17:34:02
PROP_intWbtProjectID=A23B9F7D8C574C3B9F9FEEE437B4FD7F PROP_intWbtProjectIteration=3
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_AutoTop=false PROP_DevFamily=Spartan6
PROP_DevDevice=xc6slx9 PROP_DevFamilyPMName=spartan6
PROP_DevPackage=tqg144 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-2 PROP_PreferredLanguage=Verilog
FILE_UCF=1 FILE_VERILOG=4
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=9 NGDBUILD_NUM_FDCE=9
NGDBUILD_NUM_FDE=108 NGDBUILD_NUM_FDR=17 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=1
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=6 NGDBUILD_NUM_LUT1=58 NGDBUILD_NUM_LUT2=67
NGDBUILD_NUM_LUT3=22 NGDBUILD_NUM_LUT4=34 NGDBUILD_NUM_LUT5=85 NGDBUILD_NUM_LUT6=453
NGDBUILD_NUM_MUXCY=112 NGDBUILD_NUM_MUXF7=10 NGDBUILD_NUM_OBUF=11 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=99
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=9 NGDBUILD_NUM_FDCE=9
NGDBUILD_NUM_FDE=108 NGDBUILD_NUM_FDR=17 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=1
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=6 NGDBUILD_NUM_LUT1=58 NGDBUILD_NUM_LUT2=67
NGDBUILD_NUM_LUT3=22 NGDBUILD_NUM_LUT4=34 NGDBUILD_NUM_LUT5=85 NGDBUILD_NUM_LUT6=453
NGDBUILD_NUM_MUXCY=112 NGDBUILD_NUM_MUXF7=10 NGDBUILD_NUM_OBUF=11 NGDBUILD_NUM_TS_TIMESPEC=1
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=99
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx9-2-tqg144
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5