Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.2 (WebPack) - P.28xd Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx9
Project ID (random number) ea081235f4e2469da4cf3e33d5a71d61.A26913821B0D4A4E8EA1AD2F2A4DCB4D.1 Target Package: tqg144
Registration ID __0_0_0 Target Speed: -2
Date Generated 2015-02-13T14:07:26 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i5-4670 CPU @ 3.40GHz CPU Speed 3392 MHz
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i5-4670 CPU @ 3.40GHz CPU Speed 3392 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=7
  • 12-bit adder=1
  • 3-bit adder=1
  • 3-bit subtractor=1
  • 4-bit adder=3
  • 4-bit subtractor=1
 Comparators=3
  • 4-bit comparator greater=2
  • 4-bit comparator lessequal=1
 Counters=5
  • 12-bit up counter=1
  • 2-bit up counter=1
  • 23-bit up counter=1
  • 3-bit up counter=1
  • 4-bit up counter=1
 Multiplexers=67
  • 1-bit 2-to-1 multiplexer=49
  • 1-bit 5-to-1 multiplexer=8
  • 1-bit 8-to-1 multiplexer=1
  • 12-bit 2-to-1 multiplexer=4
  • 4-bit 2-to-1 multiplexer=4
  • 8-bit 2-to-1 multiplexer=1
 Registers=79
  • Flip-Flops=79
 		MiscellaneousStatistics
  • AGG_BONDED_IO=3
  • AGG_IO=3
  • AGG_LOCED_IO=3
  • AGG_SLICE=65
  • NUM_BONDED_IOB=3
  • NUM_BSFULL=124
  • NUM_BSLUTONLY=94
  • NUM_BSUSED=218
  • NUM_BUFG=2
  • NUM_BUFIO2=1
  • NUM_BUFIO2FB=1
  • NUM_DCM=1
  • NUM_LOCED_IOB=3
  • NUM_LOGIC_O5ANDO6=13
  • NUM_LOGIC_O5ONLY=33
  • NUM_LOGIC_O6ONLY=170
  • NUM_LUT_RT_DRIVES_CARRY4=2
  • NUM_LUT_RT_EXO6=2
  • NUM_LUT_RT_O6=33
  • NUM_SLICEL=13
  • NUM_SLICEX=52
  • NUM_SLICE_CARRY4=12
  • NUM_SLICE_CONTROLSET=7
  • NUM_SLICE_CYINIT=267
  • NUM_SLICE_F7MUX=1
  • NUM_SLICE_FF=124
  • NUM_SLICE_UNUSEDCTRL=22
  • NUM_UNUSABLE_FF_BELS=20
 		NetStatistics
  • NumNets_Active=247
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=2
  • NumNodesOfType_Active_BOUNCEIN=37
  • NumNodesOfType_Active_BUFGOUT=2
  • NumNodesOfType_Active_BUFHINP2OUT=3
  • NumNodesOfType_Active_BUFIOINP=2
  • NumNodesOfType_Active_CLKPIN=43
  • NumNodesOfType_Active_CLKPINFEED=11
  • NumNodesOfType_Active_CNTRLPIN=30
  • NumNodesOfType_Active_DOUBLE=257
  • NumNodesOfType_Active_GENERIC=11
  • NumNodesOfType_Active_GLOBAL=25
  • NumNodesOfType_Active_INPUT=13
  • NumNodesOfType_Active_IOBIN2OUT=4
  • NumNodesOfType_Active_IOBOUTPUT=4
  • NumNodesOfType_Active_LUTINPUT=1022
  • NumNodesOfType_Active_OUTBOUND=234
  • NumNodesOfType_Active_OUTPUT=250
  • NumNodesOfType_Active_PADINPUT=1
  • NumNodesOfType_Active_PADOUTPUT=2
  • NumNodesOfType_Active_PINBOUNCE=124
  • NumNodesOfType_Active_PINFEED=1080
  • NumNodesOfType_Active_PINFEED2=1
  • NumNodesOfType_Active_QUAD=29
  • NumNodesOfType_Active_REGINPUT=2
  • NumNodesOfType_Active_SINGLE=387
  • NumNodesOfType_Vcc_CLKPIN=1
  • NumNodesOfType_Vcc_CNTRLPIN=1
  • NumNodesOfType_Vcc_HVCCOUT=17
  • NumNodesOfType_Vcc_LUTINPUT=46
  • NumNodesOfType_Vcc_PINFEED=48
 SiteStatistics
  • BUFG-BUFGMUX=2
  • IOB-IOBM=1
  • IOB-IOBS=2
  • SLICEL-SLICEM=3
  • SLICEX-SLICEL=12
  • SLICEX-SLICEM=10
 		SiteSummary
  • BUFG=2
  • BUFG_BUFG=2
  • BUFIO2=1
  • BUFIO2FB=1
  • BUFIO2FB_BUFIO2FB=1
  • BUFIO2_BUFIO2=1
  • CARRY4=12
  • DCM=1
  • DCM_DCM=1
  • FF_SR=1
  • HARD0=3
  • IOB=3
  • IOB_IMUX=2
  • IOB_INBUF=2
  • IOB_OUTBUF=1
  • LUT5=46
  • LUT6=218
  • PAD=3
  • REG_SR=123
  • SELMUX2_1=1
  • SLICEL=13
  • SLICEX=52
 
Configuration Data
BUFIO2FB_BUFIO2FB
  • DIVIDE_BYPASS=[TRUE:1]
  • INVERT_INPUTS=[FALSE:1]
 BUFIO2_BUFIO2
  • DIVIDE=[1:1]
  • DIVIDE_BYPASS=[TRUE:1]
  • I_INVERT=[FALSE:1]
 DCM
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC:1] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:0]
 DCM_DCM
  • CLKDV_DIVIDE=[2.0:1]
  • CLKIN_DIVIDE_BY_2=[FALSE:1]
  • CLKOUT_PHASE_SHIFT=[NONE:1]
  • CLK_FEEDBACK=[1X:1]
  • DESKEW_ADJUST=[5:1]
  • DFS_FREQUENCY_MODE=[LOW:1]
  • DLL_FREQUENCY_MODE=[LOW:1]
  • DSS_MODE=[NONE:1]
  • DUTY_CYCLE_CORRECTION=[TRUE:1]
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC:1] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:0]
  • STARTUP_WAIT=[FALSE:1]
  • VERY_HIGH_FREQUENCY=[FALSE:1]
 FF_SR
  • CK=[CK:1] [CK_INV:0]
  • SRINIT=[SRINIT0:1]
  • SYNC_ATTR=[SYNC:1]
 IOB_OUTBUF
  • DRIVEATTRBOX=[12:1]
  • SLEW=[SLOW:1]
  • SUSPEND=[3STATE:1]
 REG_SR
  • CK=[CK:123] [CK_INV:0]
  • LATCH_OR_FF=[FF:123]
  • SRINIT=[SRINIT0:122] [SRINIT1:1]
  • SYNC_ATTR=[ASYNC:103] [SYNC:20]
 SLICEL
  • CLK=[CLK:4] [CLK_INV:0]
 SLICEX
  • CLK=[CLK:39] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=2
  • O=2
 BUFG_BUFG
  • I0=2
  • O=2
 BUFIO2
  • DIVCLK=1
  • I=1
 BUFIO2FB
  • I=1
  • O=1
 BUFIO2FB_BUFIO2FB
  • I=1
  • O=1
 BUFIO2_BUFIO2
  • DIVCLK=1
  • I=1
 CARRY4
  • CIN=9
  • CO3=9
  • CYINIT=3
  • DI0=12
  • DI1=12
  • DI2=11
  • DI3=9
  • O0=12
  • O1=12
  • O2=12
  • O3=11
  • S0=12
  • S1=12
  • S2=12
  • S3=11
 DCM
  • CLK0=1
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
 DCM_DCM
  • CLK0=1
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
 FF_SR
  • CK=1
  • D=1
  • Q=1
  • SR=1
 HARD0
  • 0=3
 IOB
  • I=2
  • O=1
  • PAD=3
 IOB_IMUX
  • I=2
  • OUT=2
 IOB_INBUF
  • OUT=2
  • PAD=2
 IOB_OUTBUF
  • IN=1
  • OUT=1
 LUT5
  • A1=2
  • A2=5
  • A3=7
  • A4=7
  • A5=6
  • O5=46
 LUT6
  • A1=127
  • A2=158
  • A3=167
  • A4=179
  • A5=211
  • A6=217
  • O6=218
 PAD
  • PAD=3
 REG_SR
  • CE=67
  • CK=123
  • D=123
  • Q=123
  • SR=20
 SELMUX2_1
  • 0=1
  • 1=1
  • OUT=1
  • S0=1
 SLICEL
  • A1=2
  • A2=2
  • A3=2
  • A4=4
  • A5=12
  • A6=13
  • AMUX=9
  • AQ=4
  • AX=1
  • B=1
  • B1=4
  • B2=4
  • B3=4
  • B4=4
  • B5=13
  • B6=13
  • BMUX=9
  • BQ=3
  • BX=3
  • C1=2
  • C2=2
  • C3=2
  • C4=4
  • C5=11
  • C6=13
  • CE=3
  • CIN=9
  • CLK=4
  • CMUX=10
  • COUT=9
  • CQ=3
  • CX=2
  • D1=3
  • D2=3
  • D3=3
  • D4=4
  • D5=10
  • D6=12
  • DMUX=8
  • DQ=3
  • DX=1
  • SR=4
 SLICEX
  • A=20
  • A1=37
  • A2=44
  • A3=48
  • A4=50
  • A5=51
  • A6=51
  • AMUX=1
  • AQ=33
  • AX=1
  • B=17
  • B1=30
  • B2=39
  • B3=42
  • B4=43
  • B5=42
  • B6=43
  • BMUX=3
  • BQ=26
  • C=10
  • C1=26
  • C2=35
  • C3=36
  • C4=36
  • C5=38
  • C6=38
  • CE=17
  • CLK=39
  • CMUX=2
  • CQ=29
  • D=12
  • D1=24
  • D2=33
  • D3=34
  • D4=34
  • D5=34
  • D6=34
  • DMUX=2
  • DQ=22
  • SR=6
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
Start 0 0 0 0 0 0 0
_impact 71 51 0 0 0 0 0
bitgen 673 668 0 0 0 0 0
edif2ngd 1 1 0 0 0 0 0
map 800 677 0 0 0 0 0
netgen 9 9 0 0 0 0 0
ngc2edif 2 2 0 0 0 0 0
ngcbuild 9 9 0 0 0 0 0
ngdbuild 858 847 0 0 0 0 0
obngc 9 9 0 0 0 0 0
par 674 672 0 0 0 0 0
trce 649 649 0 0 0 0 0
xst 1284 1181 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/pn_db_nsw_select_ip.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Constraints Editor PROP_intProjectCreationTimestamp=2015-02-09T14:13:10
PROP_intWbtProjectID=A26913821B0D4A4E8EA1AD2F2A4DCB4D PROP_intWbtProjectIteration=1
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_lockPinsUcfFile=changed PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true PROP_DevFamily=Spartan6
PROP_DevDevice=xc6slx9 PROP_DevFamilyPMName=spartan6
PROP_DevPackage=tqg144 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-2 PROP_PreferredLanguage=Verilog
FILE_UCF=1 FILE_VERILOG=1
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=53 NGDBUILD_NUM_FDE=50
NGDBUILD_NUM_FDR=4 NGDBUILD_NUM_FDRE=17 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=1
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=4 NGDBUILD_NUM_LUT1=35 NGDBUILD_NUM_LUT2=13
NGDBUILD_NUM_LUT3=45 NGDBUILD_NUM_LUT4=11 NGDBUILD_NUM_LUT5=72 NGDBUILD_NUM_LUT6=86
NGDBUILD_NUM_MUXCY=44 NGDBUILD_NUM_MUXF7=1 NGDBUILD_NUM_OBUF=1 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=47
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=53 NGDBUILD_NUM_FDE=50
NGDBUILD_NUM_FDR=4 NGDBUILD_NUM_FDRE=17 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=1
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=4 NGDBUILD_NUM_LUT1=35 NGDBUILD_NUM_LUT2=13
NGDBUILD_NUM_LUT3=45 NGDBUILD_NUM_LUT4=11 NGDBUILD_NUM_LUT5=72 NGDBUILD_NUM_LUT6=86
NGDBUILD_NUM_MUXCY=44 NGDBUILD_NUM_MUXF7=1 NGDBUILD_NUM_OBUF=1 NGDBUILD_NUM_TS_TIMESPEC=1
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=47
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx9-2-tqg144
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5