`timescale 1ns / 1ps

////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer:
//
// Create Date:   13:31:07 02/11/2015
// Design Name:   IR_Receiver
// Module Name:   H:/Product/LK/FPGA/LK-Xilinx-TB/VerilogHDL/IR-Remote_Receiver/Testbench.v
// Project Name:  IR-Remote_Receiver
// Target Device:  
// Tool versions:  
// Description: 
//
// Verilog Test Fixture created by ISE for module: IR_Receiver
//
// Dependencies:
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
////////////////////////////////////////////////////////////////////////////////

module Testbench;

	// Inputs
	reg clk_main;
	reg reset;
	reg IR_Remote_Sig;

	// Outputs
	wire [31:0] PrintfData;

	// Instantiate the Unit Under Test (UUT)
	IR_Receiver uut (
		.clk_main(clk_main), 
		.reset(reset), 
		.IR_Remote_Sig(IR_Remote_Sig), 
		.PrintfData(PrintfData)
	);

	initial begin
		// Initialize Inputs
		clk_main = 0;
		reset = 0;
		IR_Remote_Sig = 0;

		// Wait 100 ns for global reset to finish
		#100;
        
		// Add stimulus here

	end
	always #10 clk_main =  ~clk_main;
      
	always
	begin
//	#4500000 IR_Remote_Sig = 0;
   #4500000 
	IR_Remote_Sig = 0;
	#4500000 
	IR_Remote_Sig = 1;
	#4500000
   /////////////////////////////////////
	// custom code1
	/////////////////////////////////////
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000
	IR_Remote_Sig = 1;	
	#565000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#565000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#565000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	/////////////////////////////////////
	// custom code2
	/////////////////////////////////////
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000
	IR_Remote_Sig = 1;	
	#565000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#565000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#565000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	/////////////////////////////////////
	// data code1
	/////////////////////////////////////
			//bit 0
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	/////////////////////////////////////
	// data code2
	/////////////////////////////////////
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 

	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 

	//bit 1
	IR_Remote_Sig = 0;
	#560000 
	IR_Remote_Sig = 1;
	#1690000 
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	
	//bit 0
	IR_Remote_Sig = 0;
	#560000 
	 IR_Remote_Sig = 1;
	#565000
	IR_Remote_Sig = 1;
	end 
endmodule