<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
   <wave_state>
   </wave_state>
   <db_ref_list>
      <db_ref path="H:/Product/LK/FPGA/LK-Xilinx-TB/VerilogHDL/Fnd-7Segment/testbench_isim_beh.wdb" id="1" type="auto">
         <top_modules>
            <top_module name="glbl" />
            <top_module name="testbench" />
         </top_modules>
      </db_ref>
   </db_ref_list>
   <WVObjectSize size="8" />
   <wvobject fp_name="/testbench/Segment" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">Segment[7:0]</obj_property>
      <obj_property name="ObjectShortName">Segment[7:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/testbench/Cathode" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">Cathode[3:0]</obj_property>
      <obj_property name="ObjectShortName">Cathode[3:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/testbench/osc" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">osc</obj_property>
      <obj_property name="ObjectShortName">osc</obj_property>
   </wvobject>
   <wvobject fp_name="/testbench/uut/fnd_cnt" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">fnd_cnt[13:0]</obj_property>
      <obj_property name="ObjectShortName">fnd_cnt[13:0]</obj_property>
      <obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
   </wvobject>
   <wvobject fp_name="/testbench/uut/fnd_cnt" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">fnd_cnt[13:0]</obj_property>
      <obj_property name="ObjectShortName">fnd_cnt[13:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/testbench/uut/tc2" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">tc2</obj_property>
      <obj_property name="ObjectShortName">tc2</obj_property>
   </wvobject>
   <wvobject fp_name="/testbench/uut/tc" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">tc</obj_property>
      <obj_property name="ObjectShortName">tc</obj_property>
   </wvobject>
   <wvobject fp_name="/testbench/uut/Segment" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">Segment[7:0]</obj_property>
      <obj_property name="ObjectShortName">Segment[7:0]</obj_property>
      <obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
   </wvobject>
</wave_config>
