Release 14.2 - xst P.28xd (nt64) Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to xst/projnav.tmp Total REAL time to Xst completion: 0.00 secs Total CPU time to Xst completion: 0.08 secs --> Parameter xsthdpdir set to xst Total REAL time to Xst completion: 0.00 secs Total CPU time to Xst completion: 0.08 secs --> Reading design: hextobcd.prj TABLE OF CONTENTS 1) Synthesis Options Summary 2) HDL Parsing 3) HDL Elaboration 4) HDL Synthesis 4.1) HDL Synthesis Report 5) Advanced HDL Synthesis 5.1) Advanced HDL Synthesis Report 6) Low Level Synthesis 7) Partition Report 8) Design Summary 8.1) Primitive and Black Box Usage 8.2) Device utilization summary 8.3) Partition Resource Summary 8.4) Timing Report 8.4.1) Clock Information 8.4.2) Asynchronous Control Signals Information 8.4.3) Timing Summary 8.4.4) Timing Details 8.4.5) Cross Clock Domains Report ========================================================================= * Synthesis Options Summary * ========================================================================= ---- Source Parameters Input File Name : "hextobcd.prj" Ignore Synthesis Constraint File : NO ---- Target Parameters Output File Name : "hextobcd" Output Format : NGC Target Device : xc6slx9-2-tqg144 ---- Source Options Top Module Name : hextobcd Automatic FSM Extraction : YES FSM Encoding Algorithm : Auto Safe Implementation : No FSM Style : LUT RAM Extraction : Yes RAM Style : Auto ROM Extraction : Yes Shift Register Extraction : YES ROM Style : Auto Resource Sharing : YES Asynchronous To Synchronous : NO Shift Register Minimum Size : 2 Use DSP Block : Auto Automatic Register Balancing : No ---- Target Options LUT Combining : Auto Reduce Control Sets : Auto Add IO Buffers : YES Global Maximum Fanout : 100000 Add Generic Clock Buffer(BUFG) : 16 Register Duplication : YES Optimize Instantiated Primitives : NO Use Clock Enable : Auto Use Synchronous Set : Auto Use Synchronous Reset : Auto Pack IO Registers into IOBs : Auto Equivalent register Removal : YES ---- General Options Optimization Goal : Speed Optimization Effort : 1 Power Reduction : NO Keep Hierarchy : No Netlist Hierarchy : As_Optimized RTL Output : Yes Global Optimization : AllClockNets Read Cores : YES Write Timing Constraints : NO Cross Clock Analysis : NO Hierarchy Separator : / Bus Delimiter : <> Case Specifier : Maintain Slice Utilization Ratio : 100 BRAM Utilization Ratio : 100 DSP48 Utilization Ratio : 100 Auto BRAM Packing : NO Slice Utilization Ratio Delta : 5 ========================================================================= ========================================================================= * HDL Parsing * ========================================================================= Analyzing Verilog file "H:\Product\LK\FPGA\LK-Xilinx-TB\VerilogHDL\Fnd-7Segment\hextobcd.v" into library work Parsing module . ========================================================================= * HDL Elaboration * ========================================================================= Elaborating module . ========================================================================= * HDL Synthesis * ========================================================================= Synthesizing Unit . Related source file is "H:\Product\LK\FPGA\LK-Xilinx-TB\VerilogHDL\Fnd-7Segment\hextobcd.v". Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 4-bit adder for signal created at line 37. Found 4-bit adder for signal created at line 39. Found 4-bit adder for signal created at line 41. Found 4-bit adder for signal created at line 43. Found 4-bit adder for signal created at line 45. Found 4-bit adder for signal created at line 47. Found 4-bit adder for signal created at line 49. Found 4-bit adder for signal created at line 51. Found 4-bit adder for signal created at line 53. Found 3-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Found 4-bit comparator greater for signal created at line 36 Found 4-bit comparator greater for signal created at line 38 Found 4-bit comparator greater for signal created at line 40 Found 4-bit comparator greater for signal created at line 42 Found 4-bit comparator greater for signal created at line 44 Found 4-bit comparator greater for signal created at line 46 Found 4-bit comparator greater for signal created at line 48 Found 4-bit comparator greater for signal created at line 50 Found 4-bit comparator greater for signal created at line 52 Summary: inferred 252 Adder/Subtractor(s). inferred 252 Comparator(s). inferred 981 Multiplexer(s). Unit synthesized. ========================================================================= HDL Synthesis Report Macro Statistics # Adders/Subtractors : 252 4-bit adder : 252 # Comparators : 252 3-bit comparator greater : 1 4-bit comparator greater : 251 # Multiplexers : 981 1-bit 2-to-1 multiplexer : 980 40-bit 2-to-1 multiplexer : 1 ========================================================================= ========================================================================= * Advanced HDL Synthesis * ========================================================================= ========================================================================= Advanced HDL Synthesis Report Macro Statistics # Adders/Subtractors : 252 3-bit adder : 24 4-bit adder : 228 # Comparators : 252 3-bit comparator greater : 1 4-bit comparator greater : 251 # Multiplexers : 981 1-bit 2-to-1 multiplexer : 980 40-bit 2-to-1 multiplexer : 1 ========================================================================= ========================================================================= * Low Level Synthesis * ========================================================================= Optimizing unit ... Mapping all equations... Building and optimizing final netlist ... Found area constraint ratio of 100 (+ 5) on block hextobcd, actual ratio is 8. Final Macro Processing ... ========================================================================= Final Register Report Found no macro ========================================================================= ========================================================================= * Partition Report * ========================================================================= Partition Implementation Status ------------------------------- No Partitions were found in this design. ------------------------------- ========================================================================= * Design Summary * ========================================================================= Top Level Output File Name : hextobcd.ngc Primitive and Black Box Usage: ------------------------------ # BELS : 420 # LUT3 : 1 # LUT4 : 9 # LUT5 : 42 # LUT6 : 368 # IO Buffers : 71 # IBUF : 31 # OBUF : 40 Device utilization summary: --------------------------- Selected Device : 6slx9tqg144-2 Slice Logic Utilization: Number of Slice LUTs: 420 out of 5720 7% Number used as Logic: 420 out of 5720 7% Slice Logic Distribution: Number of LUT Flip Flop pairs used: 420 Number with an unused Flip Flop: 420 out of 420 100% Number with an unused LUT: 0 out of 420 0% Number of fully used LUT-FF pairs: 0 out of 420 0% Number of unique control sets: 0 IO Utilization: Number of IOs: 71 Number of bonded IOBs: 71 out of 102 69% Specific Feature Utilization: --------------------------- Partition Resource Summary: --------------------------- No Partitions were found in this design. --------------------------- ========================================================================= Timing Report NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE. FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT GENERATED AFTER PLACE-and-ROUTE. Clock Information: ------------------ No clock signals found in this design Asynchronous Control Signals Information: ---------------------------------------- No asynchronous control signals found in this design Timing Summary: --------------- Speed Grade: -2 Minimum period: No path found Minimum input arrival time before clock: No path found Maximum output required time after clock: No path found Maximum combinational path delay: 54.119ns Timing Details: --------------- All values displayed in nanoseconds (ns) ========================================================================= Timing constraint: Default path analysis Total number of paths / destination ports: 1101474542801327 / 40 ------------------------------------------------------------------------- Delay: 54.119ns (Levels of Logic = 36) Source: hex<29> (PAD) Destination: bcdout<36> (PAD) Data Path: hex<29> to bcdout<36> Gate Net Cell:in->out fanout Delay Delay Logical Name (Net Name) ---------------------------------------- ------------ IBUF:I->O 7 1.328 1.340 hex_29_IBUF (hex_29_IBUF) LUT5:I0->O 3 0.254 1.221 Mmux_GND_1_o_GND_1_o_MUX_116_o111 (Madd_GND_1_o_GND_1_o_add_56_OUT_lut<3>) LUT6:I0->O 9 0.254 1.204 Mmux_GND_1_o_GND_1_o_MUX_152_o11 (Madd_GND_1_o_GND_1_o_add_76_OUT_cy<0>) LUT6:I3->O 15 0.235 1.383 Mmux_GND_1_o_GND_1_o_MUX_192_o11 (Madd_GND_1_o_GND_1_o_add_96_OUT_cy<0>) LUT5:I2->O 4 0.235 1.234 Mmux_GND_1_o_GND_1_o_MUX_192_o111 (Madd_GND_1_o_GND_1_o_add_94_OUT_lut<3>) LUT5:I0->O 3 0.254 1.221 Mmux_GND_1_o_GND_1_o_MUX_228_o111 (Madd_GND_1_o_GND_1_o_add_112_OUT_lut<3>) LUT6:I0->O 12 0.254 1.177 Mmux_GND_1_o_GND_1_o_MUX_264_o12 (Madd_GND_1_o_GND_1_o_add_132_OUT_cy<0>) LUT4:I2->O 7 0.250 1.138 Mmux_GND_1_o_GND_1_o_MUX_304_o13 (Madd_GND_1_o_GND_1_o_add_152_OUT_cy<0>) LUT5:I2->O 2 0.235 1.002 Mmux_GND_1_o_GND_1_o_MUX_304_o111 (Madd_GND_1_o_GND_1_o_add_150_OUT_lut<3>) LUT5:I1->O 3 0.254 1.221 Mmux_GND_1_o_GND_1_o_MUX_340_o111 (Madd_GND_1_o_GND_1_o_add_168_OUT_lut<3>) LUT6:I0->O 9 0.254 1.204 Mmux_GND_1_o_GND_1_o_MUX_376_o12 (Madd_GND_1_o_GND_1_o_add_188_OUT_cy<0>) LUT6:I3->O 15 0.235 1.383 Mmux_GND_1_o_GND_1_o_MUX_416_o11 (Madd_GND_1_o_GND_1_o_add_208_OUT_cy<0>) LUT5:I2->O 4 0.235 1.234 Mmux_GND_1_o_GND_1_o_MUX_416_o111 (Madd_GND_1_o_GND_1_o_add_206_OUT_lut<3>) LUT5:I0->O 3 0.254 1.221 Mmux_GND_1_o_GND_1_o_MUX_452_o111 (Madd_GND_1_o_GND_1_o_add_224_OUT_lut<3>) LUT6:I0->O 12 0.254 1.177 Mmux_GND_1_o_GND_1_o_MUX_488_o12 (Madd_GND_1_o_GND_1_o_add_244_OUT_cy<0>) LUT4:I2->O 7 0.250 1.138 Mmux_GND_1_o_GND_1_o_MUX_528_o13 (Madd_GND_1_o_GND_1_o_add_264_OUT_cy<0>) LUT5:I2->O 2 0.235 1.002 Mmux_GND_1_o_GND_1_o_MUX_528_o111 (Madd_GND_1_o_GND_1_o_add_262_OUT_lut<3>) LUT5:I1->O 3 0.254 1.221 Mmux_GND_1_o_GND_1_o_MUX_564_o111 (Madd_GND_1_o_GND_1_o_add_280_OUT_lut<3>) LUT6:I0->O 9 0.254 1.204 Mmux_GND_1_o_GND_1_o_MUX_600_o12 (Madd_GND_1_o_GND_1_o_add_300_OUT_cy<0>) LUT6:I3->O 15 0.235 1.383 Mmux_GND_1_o_GND_1_o_MUX_640_o11 (Madd_GND_1_o_GND_1_o_add_320_OUT_cy<0>) LUT5:I2->O 4 0.235 1.234 Mmux_GND_1_o_GND_1_o_MUX_640_o111 (Madd_GND_1_o_GND_1_o_add_318_OUT_lut<3>) LUT5:I0->O 3 0.254 1.221 Mmux_GND_1_o_GND_1_o_MUX_676_o111 (Madd_GND_1_o_GND_1_o_add_336_OUT_lut<3>) LUT6:I0->O 12 0.254 1.177 Mmux_GND_1_o_GND_1_o_MUX_712_o12 (Madd_GND_1_o_GND_1_o_add_356_OUT_cy<0>) LUT4:I2->O 7 0.250 1.138 Mmux_GND_1_o_GND_1_o_MUX_752_o13 (Madd_GND_1_o_GND_1_o_add_376_OUT_cy<0>) LUT5:I2->O 2 0.235 1.002 Mmux_GND_1_o_GND_1_o_MUX_752_o111 (Madd_GND_1_o_GND_1_o_add_374_OUT_lut<3>) LUT5:I1->O 3 0.254 1.221 Mmux_GND_1_o_GND_1_o_MUX_788_o111 (Madd_GND_1_o_GND_1_o_add_392_OUT_lut<3>) LUT6:I0->O 9 0.254 1.204 Mmux_GND_1_o_GND_1_o_MUX_824_o12 (Madd_GND_1_o_GND_1_o_add_412_OUT_cy<0>) LUT6:I3->O 12 0.235 1.297 Mmux_GND_1_o_GND_1_o_MUX_864_o11 (Madd_n1705_Madd_cy<0>) LUT5:I2->O 4 0.235 1.234 Mmux_GND_1_o_GND_1_o_MUX_864_o111 (Madd_GND_1_o_GND_1_o_add_430_OUT_lut<3>) LUT5:I0->O 3 0.254 1.221 Mmux_GND_1_o_GND_1_o_MUX_900_o111 (Madd_GND_1_o_GND_1_o_add_448_OUT_lut<3>) LUT6:I0->O 10 0.254 1.116 Mmux_GND_1_o_GND_1_o_MUX_936_o12 (Madd_GND_1_o_GND_1_o_add_468_OUT_cy<0>) LUT4:I2->O 8 0.250 1.172 Mmux_GND_1_o_GND_1_o_MUX_977_o131 (bcdout_38_OBUF) LUT5:I2->O 2 0.235 1.002 Mmux_GND_1_o_GND_1_o_MUX_977_o12 (Madd_GND_1_o_GND_1_o_add_486_OUT_lut<3>) LUT5:I1->O 4 0.254 1.259 Mmux_GND_1_o_GND_1_o_MUX_1013_o11 (Madd_GND_1_o_GND_1_o_add_504_OUT_lut<3>) LUT6:I0->O 1 0.254 0.681 Mmux_result<33>131 (bcdout_36_OBUF) OBUF:I->O 2.912 bcdout_36_OBUF (bcdout<36>) ---------------------------------------- Total 54.119ns (12.632ns logic, 41.487ns route) (23.3% logic, 76.7% route) ========================================================================= Cross Clock Domains Report: -------------------------- ========================================================================= Total REAL time to Xst completion: 13.00 secs Total CPU time to Xst completion: 12.83 secs --> Total memory usage is 271944 kilobytes Number of errors : 0 ( 0 filtered) Number of warnings : 0 ( 0 filtered) Number of infos : 0 ( 0 filtered)