"H:\Product\LK\FPGA\LK-Xilinx-TB\VerilogHDL\Encoder_Rotary\top.v" Line 95: Port CLK180 is not connected to this instance "H:\Product\LK\FPGA\LK-Xilinx-TB\VerilogHDL\Encoder_Rotary\Encoder_Read.v" Line 128: Net <reset_enc_cnt> does not have a driver. "H:\Product\LK\FPGA\LK-Xilinx-TB\VerilogHDL\Encoder_Rotary\LCD.v" Line 137: Result of 10-bit expression is truncated to fit in 9-bit target. "H:\Product\LK\FPGA\LK-Xilinx-TB\VerilogHDL\Encoder_Rotary\LCD.v" Line 231: Result of 32-bit expression is truncated to fit in 1-bit target. "H:\Product\LK\FPGA\LK-Xilinx-TB\VerilogHDL\Encoder_Rotary\hextobcd.v" Line 41: Assignment to bcd ignored, since the identifier is never used "H:\Product\LK\FPGA\LK-Xilinx-TB\VerilogHDL\Encoder_Rotary\LCD.v" Line 261: Size mismatch in connection of port <hex>. Formal port size is 31-bit while actual signal size is 32-bit. "H:\Product\LK\FPGA\LK-Xilinx-TB\VerilogHDL\Encoder_Rotary\top.v" line 74: Output port <dir> of the instance <enc> is unconnected or connected to loadless signal. Signal <reset_enc_cnt> is used but never assigned. This sourceless signal will be automatically connected to value GND. Node <enc/dir_1> of sequential type is unconnected in block <top>. Node <enc/dir_0> of sequential type is unconnected in block <top>. FF/Latch <TextLcd/cnt_hz_31> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_30> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_29> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_28> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_27> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_26> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_25> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_24> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_23> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_22> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_21> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_20> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_19> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_18> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_17> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. FF/Latch <TextLcd/cnt_hz_16> has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process. The FF/Latch <enc/enc_value_r_1> in Unit <top> is equivalent to the following FF/Latch, which will be removed : <enc/Old_EncoderAB_1>