Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.2 (WebPack) - P.28xd Target Family: Spartan3
OS Platform: NT64 Target Device: xc3s200
Project ID (random number) ea081235f4e2469da4cf3e33d5a71d61.A23B9F7D8C574C3B9F9FEEE437B4FD7F.4 Target Package: tq144
Registration ID __0_0_0 Target Speed: -4
Date Generated 2015-04-18T13:46:57 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i5-4670 CPU @ 3.40GHz CPU Speed 3392 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=166
  • 32-bit adder=2
  • 4-bit adder=144
  • 6-bit adder carry out=20
 Comparators=158
  • 32-bit comparator greatequal=3
  • 4-bit comparator greater=144
  • 5-bit comparator lessequal=10
  • 8-bit comparator less=1
 Counters=5
  • 2-bit up counter=1
  • 32-bit up counter=3
  • 9-bit up counter=1
 FSMs=2 Registers=102
  • Flip-Flops=102
 		MiscellaneousStatistics
  • AGG_BONDED_IO=13
  • AGG_IO=13
  • AGG_SLICE=603
  • NUM_4_INPUT_LUT=1074
  • NUM_BONDED_IOB=13
  • NUM_BUFGMUX=1
  • NUM_CYMUX=218
  • NUM_LUT_RT=171
  • NUM_SLICEL=603
  • NUM_SLICE_FF=216
  • NUM_XOR=168
 		NetStatistics
  • NumNets_Active=1168
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=118
  • NumNodesOfType_Active_CNTRLPIN=86
  • NumNodesOfType_Active_DOUBLE=1554
  • NumNodesOfType_Active_DUMMY=3595
  • NumNodesOfType_Active_DUMMYESC=2
  • NumNodesOfType_Active_GLOBAL=38
  • NumNodesOfType_Active_HUNIHEX=15
  • NumNodesOfType_Active_INPUT=3757
  • NumNodesOfType_Active_IOBOUTPUT=2
  • NumNodesOfType_Active_OMUX=1234
  • NumNodesOfType_Active_OUTPUT=1159
  • NumNodesOfType_Active_PREBXBY=50
  • NumNodesOfType_Active_VFULLHEX=24
  • NumNodesOfType_Active_VLONG=2
  • NumNodesOfType_Active_VUNIHEX=36
  • NumNodesOfType_Gnd_DOUBLE=2
  • NumNodesOfType_Gnd_INPUT=10
  • NumNodesOfType_Gnd_OMUX=8
  • NumNodesOfType_Gnd_OUTPUT=9
  • NumNodesOfType_Gnd_PREBXBY=10
 SiteStatistics
  • IOB-DIFFM=6
  • IOB-DIFFS=7
  • SLICEL-SLICEM=321
 		SiteSummary
  • BUFGMUX=1
  • BUFGMUX_GCLKMUX=1
  • BUFGMUX_GCLK_BUFFER=1
  • IOB=13
  • IOB_INBUF=2
  • IOB_OUTBUF=11
  • IOB_PAD=13
  • SLICEL=603
  • SLICEL_C1VDD=12
  • SLICEL_C2VDD=13
  • SLICEL_CYMUXF=111
  • SLICEL_CYMUXG=107
  • SLICEL_F=578
  • SLICEL_F5MUX=14
  • SLICEL_FFX=104
  • SLICEL_FFY=112
  • SLICEL_G=496
  • SLICEL_GNDF=99
  • SLICEL_GNDG=94
  • SLICEL_XORF=85
  • SLICEL_XORG=83
 
Configuration Data
BUFGMUX
  • S=[S_INV:1] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:1]
  • S=[S_INV:1] [S:0]
 BUFIO2FB_BUFIO2FB
  • DIVIDE_BYPASS=[TRUE:1]
  • INVERT_INPUTS=[FALSE:1]
 BUFIO2_BUFIO2
  • DIVIDE=[1:1]
  • DIVIDE_BYPASS=[TRUE:1]
  • I_INVERT=[FALSE:1]
 DCM
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC:1] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:0]
 DCM_DCM
  • CLKDV_DIVIDE=[2.0:1]
  • CLKIN_DIVIDE_BY_2=[FALSE:1]
  • CLKOUT_PHASE_SHIFT=[NONE:1]
  • CLK_FEEDBACK=[1X:1]
  • DESKEW_ADJUST=[5:1]
  • DFS_FREQUENCY_MODE=[LOW:1]
  • DLL_FREQUENCY_MODE=[LOW:1]
  • DSS_MODE=[NONE:1]
  • DUTY_CYCLE_CORRECTION=[TRUE:1]
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC:1] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:0]
  • STARTUP_WAIT=[FALSE:1]
  • VERY_HIGH_FREQUENCY=[FALSE:1]
 FF_SR
  • CK=[CK:1] [CK_INV:0]
  • SRINIT=[SRINIT0:1]
  • SYNC_ATTR=[ASYNC:1]
 IOB
  • O1=[O1_INV:1] [O1:10]
 IOB_OUTBUF
  • IN=[IN_INV:1] [IN:10]
 IOB_PAD
  • DRIVEATTRBOX=[12:11]
  • IOATTRBOX=[LVCMOS33:13]
  • SLEW=[SLOW:11]
 REG_SR
  • CK=[CK:142] [CK_INV:0]
  • LATCH_OR_FF=[FF:142]
  • SRINIT=[SRINIT0:141] [SRINIT1:1]
  • SYNC_ATTR=[ASYNC:125] [SYNC:17]
 SLICEL
  • BX=[BX_INV:0] [BX:42]
  • BY=[BY:23] [BY_INV:1]
  • CE=[CE:58] [CE_INV:0]
  • CIN=[CIN_INV:0] [CIN:101]
  • CLK=[CLK:118] [CLK_INV:0]
  • SR=[SR:28] [SR_INV:0]
 SLICEL_CYMUXF
  • 0=[0:111] [0_INV:0]
  • 1=[1_INV:0] [1:111]
 SLICEL_CYMUXG
  • 0=[0:107] [0_INV:0]
 SLICEL_F5MUX
  • S0=[S0:14] [S0_INV:0]
 SLICEL_FFX
  • CE=[CE:53] [CE_INV:0]
  • CK=[CK:104] [CK_INV:0]
  • D=[D:104] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:103] [INIT1:1]
  • FFX_SR_ATTR=[SRLOW:103] [SRHIGH:1]
  • LATCH_OR_FF=[FF:104]
  • SR=[SR:22] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:87] [SYNC:17]
 SLICEL_FFY
  • CE=[CE:57] [CE_INV:0]
  • CK=[CK:112] [CK_INV:0]
  • D=[D:111] [D_INV:1]
  • FFY_INIT_ATTR=[INIT0:109] [INIT1:3]
  • FFY_SR_ATTR=[SRLOW:107] [SRHIGH:5]
  • LATCH_OR_FF=[FF:112]
  • SR=[SR:26] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:90] [SYNC:22]
 SLICEL_XORF
  • 1=[1_INV:0] [1:85]
 SLICEX
  • CLK=[CLK:24] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=2
  • O=2
 BUFGMUX
  • I0=1
  • O=1
  • S=1
 BUFGMUX_GCLKMUX
  • I0=1
  • OUT=1
  • S=1
 BUFGMUX_GCLK_BUFFER
  • IN=1
  • OUT=1
 BUFG_BUFG
  • I0=2
  • O=2
 BUFIO2
  • DIVCLK=1
  • I=1
 BUFIO2FB
  • I=1
  • O=1
 BUFIO2FB_BUFIO2FB
  • I=1
  • O=1
 BUFIO2_BUFIO2
  • DIVCLK=1
  • I=1
 CARRY4
  • CIN=24
  • CO0=1
  • CO1=2
  • CO2=1
  • CO3=24
  • CYINIT=8
  • DI0=30
  • DI1=28
  • DI2=27
  • DI3=24
  • O0=26
  • O1=25
  • O2=25
  • O3=23
  • S0=32
  • S1=30
  • S2=29
  • S3=26
 DCM
  • CLK0=1
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
 DCM_DCM
  • CLK0=1
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
 FF_SR
  • CE=1
  • CK=1
  • D=1
  • Q=1
 HARD0
  • 0=3
 HARD1
  • 1=3
 IOB
  • I=2
  • O1=11
  • PAD=13
 IOB_IMUX
  • I=2
  • OUT=2
 IOB_INBUF
  • IN=2
  • OUT=2
 IOB_OUTBUF
  • IN=11
  • OUT=11
 IOB_PAD
  • PAD=13
 LUT5
  • A1=47
  • A2=55
  • A3=52
  • A4=53
  • A5=46
  • O5=150
 LUT6
  • A1=486
  • A2=512
  • A3=531
  • A4=612
  • A5=627
  • A6=665
  • O6=671
 PAD
  • PAD=13
 REG_SR
  • CE=116
  • CK=142
  • D=142
  • Q=142
  • SR=26
 SELMUX2_1
  • 0=10
  • 1=10
  • OUT=10
  • S0=10
 SLICEL
  • BX=42
  • BY=24
  • CE=58
  • CIN=101
  • CLK=118
  • COUT=107
  • F1=578
  • F2=486
  • F3=470
  • F4=421
  • G1=494
  • G2=403
  • G3=393
  • G4=349
  • SR=28
  • X=462
  • XQ=104
  • Y=367
  • YQ=112
 SLICEL_C1VDD
  • 1=12
 SLICEL_C2VDD
  • 1=13
 SLICEL_CYMUXF
  • 0=111
  • 1=111
  • OUT=111
  • S0=111
 SLICEL_CYMUXG
  • 0=107
  • 1=107
  • OUT=107
  • S0=107
 SLICEL_F
  • A1=578
  • A2=486
  • A3=470
  • A4=421
  • D=578
 SLICEL_F5MUX
  • F=14
  • G=14
  • OUT=14
  • S0=14
 SLICEL_FFX
  • CE=53
  • CK=104
  • D=104
  • Q=104
  • SR=22
 SLICEL_FFY
  • CE=57
  • CK=112
  • D=112
  • Q=112
  • SR=26
 SLICEL_G
  • A1=494
  • A2=403
  • A3=393
  • A4=349
  • D=496
 SLICEL_GNDF
  • 0=99
 SLICEL_GNDG
  • 0=94
 SLICEL_XORF
  • 0=85
  • 1=85
  • O=85
 SLICEL_XORG
  • 0=83
  • 1=83
  • O=83
 SLICEX
  • A=140
  • A1=135
  • A2=140
  • A3=142
  • A4=143
  • A5=150
  • A6=151
  • AMUX=9
  • AQ=21
  • AX=10
  • B=99
  • B1=92
  • B2=100
  • B3=101
  • B4=102
  • B5=107
  • B6=107
  • BMUX=12
  • BQ=18
  • BX=9
  • C=123
  • C1=119
  • C2=124
  • C3=124
  • C4=125
  • C5=131
  • C6=132
  • CE=18
  • CLK=24
  • CMUX=8
  • CQ=17
  • CX=8
  • D=121
  • D1=115
  • D2=118
  • D3=121
  • D4=121
  • D5=128
  • D6=128
  • DMUX=13
  • DQ=14
  • DX=7
  • SR=1
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s200-tq144-4 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s200-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s200-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
Start 0 0 0 0 0 0 0
_impact 98 76 0 0 0 0 0
arwz 5 5 0 0 0 0 0
bitgen 766 761 0 0 0 0 0
edif2ngd 1 1 0 0 0 0 0
map 917 782 0 0 0 0 0
netgen 9 9 0 0 0 0 0
ngc2edif 3 3 0 0 0 0 0
ngcbuild 9 9 0 0 0 0 0
ngdbuild 989 978 0 0 0 0 0
obngc 9 9 0 0 0 0 0
par 779 774 3 0 0 0 0
trce 751 751 0 0 0 0 0
xst 1467 1358 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/pn_db_nsw_select_ip.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Constraints Editor PROP_intProjectCreationTimestamp=2015-02-12T17:34:02
PROP_intWbtProjectID=A23B9F7D8C574C3B9F9FEEE437B4FD7F PROP_intWbtProjectIteration=4
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=false
PROP_DevFamily=Spartan3 PROP_DevDevice=xc3s200
PROP_DevFamilyPMName=spartan3 PROP_DevPackage=tq144
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-4
PROP_PreferredLanguage=Verilog FILE_UCF=1
FILE_VERILOG=4
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FD=68 NGDBUILD_NUM_FDCE=9 NGDBUILD_NUM_FDE=100
NGDBUILD_NUM_FDR=33 NGDBUILD_NUM_FDS=5 NGDBUILD_NUM_FDSE=1 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=1 NGDBUILD_NUM_INV=14 NGDBUILD_NUM_LUT1=171 NGDBUILD_NUM_LUT2=26
NGDBUILD_NUM_LUT3=89 NGDBUILD_NUM_LUT3_D=2 NGDBUILD_NUM_LUT3_L=2 NGDBUILD_NUM_LUT4=766
NGDBUILD_NUM_LUT4_D=4 NGDBUILD_NUM_MUXCY=218 NGDBUILD_NUM_MUXF5=14 NGDBUILD_NUM_OBUF=11
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=168
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FD=68 NGDBUILD_NUM_FDCE=9 NGDBUILD_NUM_FDE=100
NGDBUILD_NUM_FDR=33 NGDBUILD_NUM_FDS=5 NGDBUILD_NUM_FDSE=1 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=1 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=14 NGDBUILD_NUM_LUT1=171
NGDBUILD_NUM_LUT2=26 NGDBUILD_NUM_LUT3=89 NGDBUILD_NUM_LUT3_D=2 NGDBUILD_NUM_LUT3_L=2
NGDBUILD_NUM_LUT4=766 NGDBUILD_NUM_LUT4_D=4 NGDBUILD_NUM_MUXCY=218 NGDBUILD_NUM_MUXF5=14
NGDBUILD_NUM_OBUF=11 NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=168
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ifmt=mixed -ofn=<design_top> -ofmt=NGC
-p=xc3s200-4-tq144 -top=<design_top> -opt_mode=Speed -opt_level=1
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -verilog2001=YES
-fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No -fsm_style=LUT
-ram_extract=Yes -ram_style=Auto -rom_extract=Yes -shreg_extract=YES
-rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES -async_to_sync=NO
-mult_style=Auto -iobuf=YES -max_fanout=500 -bufg=8
-register_duplication=YES -register_balancing=No -optimize_primitives=NO -use_clock_enable=Yes
-use_sync_set=Yes -use_sync_reset=Yes -iob=Auto -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5