Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.2 (WebPack) - P.28xd Target Family: Spartan3
OS Platform: NT64 Target Device: xc3s200
Project ID (random number) ea081235f4e2469da4cf3e33d5a71d61.B30D3935F43C448D9069F55B4C16A3B4.5 Target Package: tq144
Registration ID __0_0_0 Target Speed: -4
Date Generated 2015-04-18T13:38:58 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i5-4670 CPU @ 3.40GHz CPU Speed 3392 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Counters=3
  • 2-bit up counter=1
  • 28-bit up counter=1
  • 32-bit up counter=1
 FSMs=1 Registers=3
  • Flip-Flops=3
 		MiscellaneousStatistics
  • AGG_BONDED_IO=2
  • AGG_IO=2
  • AGG_SLICE=84
  • NUM_4_INPUT_LUT=157
  • NUM_BONDED_IOB=2
  • NUM_BUFGMUX=1
  • NUM_CYMUX=65
  • NUM_LUT_RT=58
  • NUM_SLICEL=84
  • NUM_SLICE_FF=67
  • NUM_XOR=60
 		NetStatistics
  • NumNets_Active=190
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=37
  • NumNodesOfType_Active_CNTRLPIN=38
  • NumNodesOfType_Active_DOUBLE=221
  • NumNodesOfType_Active_DUMMY=380
  • NumNodesOfType_Active_DUMMYESC=1
  • NumNodesOfType_Active_GLOBAL=20
  • NumNodesOfType_Active_HUNIHEX=4
  • NumNodesOfType_Active_INPUT=414
  • NumNodesOfType_Active_IOBOUTPUT=1
  • NumNodesOfType_Active_OMUX=166
  • NumNodesOfType_Active_OUTPUT=187
  • NumNodesOfType_Active_PREBXBY=2
  • NumNodesOfType_Active_VFULLHEX=2
  • NumNodesOfType_Active_VUNIHEX=7
 SiteStatistics
  • IOB-DIFFM=1
  • IOB-DIFFS=1
  • SLICEL-SLICEM=43
 		SiteSummary
  • BUFGMUX=1
  • BUFGMUX_GCLKMUX=1
  • BUFGMUX_GCLK_BUFFER=1
  • IOB=2
  • IOB_INBUF=1
  • IOB_OUTBUF=1
  • IOB_PAD=2
  • SLICEL=84
  • SLICEL_C1VDD=2
  • SLICEL_CYMUXF=34
  • SLICEL_CYMUXG=31
  • SLICEL_F=81
  • SLICEL_FFX=34
  • SLICEL_FFY=33
  • SLICEL_G=76
  • SLICEL_GNDF=32
  • SLICEL_GNDG=31
  • SLICEL_XORF=30
  • SLICEL_XORG=30
 
Configuration Data
BUFGMUX
  • S=[S_INV:1] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:1]
  • S=[S_INV:1] [S:0]
 IOB
  • O1=[O1_INV:0] [O1:1]
 IOB_OUTBUF
  • IN=[IN_INV:0] [IN:1]
 IOB_PAD
  • DRIVEATTRBOX=[12:1]
  • IOATTRBOX=[LVCMOS33:2]
  • SLEW=[SLOW:1]
 REG_SR
  • CK=[CK:66] [CK_INV:0]
  • LATCH_OR_FF=[FF:66]
  • SRINIT=[SRINIT0:65] [SRINIT1:1]
  • SYNC_ATTR=[ASYNC:64] [SYNC:2]
 SLICEL
  • BX=[BX_INV:0] [BX:3]
  • BY=[BY:2] [BY_INV:2]
  • CE=[CE:3] [CE_INV:0]
  • CIN=[CIN_INV:0] [CIN:31]
  • CLK=[CLK:37] [CLK_INV:0]
  • SR=[SR:35] [SR_INV:0]
 SLICEL_CYMUXF
  • 0=[0:34] [0_INV:0]
  • 1=[1_INV:0] [1:34]
 SLICEL_CYMUXG
  • 0=[0:31] [0_INV:0]
 SLICEL_FFX
  • CE=[CE:1] [CE_INV:0]
  • CK=[CK:34] [CK_INV:0]
  • D=[D:34] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:34]
  • FFX_SR_ATTR=[SRLOW:34]
  • LATCH_OR_FF=[FF:34]
  • SR=[SR:33] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:32] [SYNC:2]
 SLICEL_FFY
  • CE=[CE:3] [CE_INV:0]
  • CK=[CK:33] [CK_INV:0]
  • D=[D:31] [D_INV:2]
  • FFY_INIT_ATTR=[INIT0:32] [INIT1:1]
  • FFY_SR_ATTR=[SRLOW:33]
  • LATCH_OR_FF=[FF:33]
  • SR=[SR:31] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:32] [SYNC:1]
 SLICEL_XORF
  • 1=[1_INV:0] [1:30]
 SLICEX
  • CLK=[CLK:20] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
 BUFGMUX
  • I0=1
  • O=1
  • S=1
 BUFGMUX_GCLKMUX
  • I0=1
  • OUT=1
  • S=1
 BUFGMUX_GCLK_BUFFER
  • IN=1
  • OUT=1
 BUFG_BUFG
  • I0=1
  • O=1
 CARRY4
  • CIN=13
  • CO3=13
  • CYINIT=2
  • DI0=15
  • DI1=15
  • DI2=15
  • DI3=13
  • O0=15
  • O1=15
  • O2=15
  • O3=15
  • S0=15
  • S1=15
  • S2=15
  • S3=15
 HARD0
  • 0=2
 IOB
  • I=1
  • O1=1
  • PAD=2
 IOB_IMUX
  • I=1
  • OUT=1
 IOB_INBUF
  • IN=1
  • OUT=1
 IOB_OUTBUF
  • IN=1
  • OUT=1
 IOB_PAD
  • PAD=2
 LUT5
  • O5=58
 LUT6
  • A1=17
  • A2=17
  • A3=19
  • A4=27
  • A5=142
  • A6=145
  • O6=147
 PAD
  • PAD=2
 REG_SR
  • CE=3
  • CK=66
  • D=66
  • Q=66
  • SR=63
 SELMUX2_1
  • 0=1
  • 1=1
  • OUT=1
  • S0=1
 SLICEL
  • BX=3
  • BY=4
  • CE=3
  • CIN=31
  • CLK=37
  • COUT=31
  • F1=81
  • F2=51
  • F3=35
  • F4=31
  • G1=76
  • G2=46
  • G3=31
  • G4=28
  • SR=35
  • X=43
  • XB=1
  • XQ=34
  • Y=44
  • YQ=33
 SLICEL_C1VDD
  • 1=2
 SLICEL_CYMUXF
  • 0=34
  • 1=34
  • OUT=34
  • S0=34
 SLICEL_CYMUXG
  • 0=31
  • 1=31
  • OUT=31
  • S0=31
 SLICEL_F
  • A1=81
  • A2=51
  • A3=35
  • A4=31
  • D=81
 SLICEL_FFX
  • CE=1
  • CK=34
  • D=34
  • Q=34
  • SR=33
 SLICEL_FFY
  • CE=3
  • CK=33
  • D=33
  • Q=33
  • SR=31
 SLICEL_G
  • A1=76
  • A2=46
  • A3=31
  • A4=28
  • D=76
 SLICEL_GNDF
  • 0=32
 SLICEL_GNDG
  • 0=31
 SLICEL_XORF
  • 0=30
  • 1=30
  • O=30
 SLICEL_XORG
  • 0=30
  • 1=30
  • O=30
 SLICEX
  • A=10
  • A1=7
  • A2=7
  • A3=8
  • A4=11
  • A5=25
  • A6=25
  • AQ=16
  • B=4
  • B1=4
  • B2=4
  • B3=4
  • B4=5
  • B5=20
  • B6=21
  • BQ=17
  • C=3
  • C1=2
  • C2=2
  • C3=2
  • C4=4
  • C5=17
  • C6=17
  • CE=2
  • CLK=20
  • CQ=15
  • D=2
  • D1=1
  • D2=1
  • D3=1
  • D4=3
  • D5=18
  • D6=18
  • DQ=16
  • SR=18
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s200-tq144-4 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s200-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s200-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
Start 0 0 0 0 0 0 0
_impact 98 76 0 0 0 0 0
arwz 5 5 0 0 0 0 0
bitgen 765 760 0 0 0 0 0
edif2ngd 1 1 0 0 0 0 0
map 916 781 0 0 0 0 0
netgen 9 9 0 0 0 0 0
ngc2edif 3 3 0 0 0 0 0
ngcbuild 9 9 0 0 0 0 0
ngdbuild 987 976 0 0 0 0 0
obngc 9 9 0 0 0 0 0
par 778 773 3 0 0 0 0
trce 750 750 0 0 0 0 0
xst 1462 1353 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/pn_db_nsw_select_ip.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Constraints Editor PROP_intProjectCreationTimestamp=2015-02-04T17:46:09
PROP_intWbtProjectID=B30D3935F43C448D9069F55B4C16A3B4 PROP_intWbtProjectIteration=5
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_lockPinsUcfFile=changed PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true PROP_DevFamily=Spartan3
PROP_DevDevice=xc3s200 PROP_DevFamilyPMName=spartan3
PROP_DevPackage=tq144 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-4 PROP_PreferredLanguage=Verilog
FILE_UCF=1 FILE_VERILOG=1
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDC=60 NGDBUILD_NUM_FDCE=1 NGDBUILD_NUM_FDE=3
NGDBUILD_NUM_FDR=3 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_INV=4 NGDBUILD_NUM_LUT1=58
NGDBUILD_NUM_LUT2=31 NGDBUILD_NUM_LUT3=4 NGDBUILD_NUM_LUT3_D=3 NGDBUILD_NUM_LUT4=51
NGDBUILD_NUM_LUT4_D=5 NGDBUILD_NUM_LUT4_L=3 NGDBUILD_NUM_MUXCY=65 NGDBUILD_NUM_OBUF=1
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=60
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDC=60 NGDBUILD_NUM_FDCE=1 NGDBUILD_NUM_FDE=3
NGDBUILD_NUM_FDR=3 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=4
NGDBUILD_NUM_LUT1=58 NGDBUILD_NUM_LUT2=31 NGDBUILD_NUM_LUT3=4 NGDBUILD_NUM_LUT3_D=3
NGDBUILD_NUM_LUT4=51 NGDBUILD_NUM_LUT4_D=5 NGDBUILD_NUM_LUT4_L=3 NGDBUILD_NUM_MUXCY=65
NGDBUILD_NUM_OBUF=1 NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=60
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ifmt=mixed -ofn=<design_top> -ofmt=NGC
-p=xc3s200-4-tq144 -top=<design_top> -opt_mode=Speed -opt_level=1
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -verilog2001=YES
-fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No -fsm_style=LUT
-ram_extract=Yes -ram_style=Auto -rom_extract=Yes -shreg_extract=YES
-rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES -async_to_sync=NO
-mult_style=Auto -iobuf=YES -max_fanout=500 -bufg=8
-register_duplication=YES -register_balancing=No -optimize_primitives=NO -use_clock_enable=Yes
-use_sync_set=Yes -use_sync_reset=Yes -iob=Auto -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5