Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.2 (WebPack) - P.28xd Target Family: Spartan3
OS Platform: NT64 Target Device: xc3s200
Project ID (random number) ea081235f4e2469da4cf3e33d5a71d61.114E1D12B0454F159FABD1D59B0B2CF4.5 Target Package: tq144
Registration ID __0_0_0 Target Speed: -4
Date Generated 2015-04-16T17:53:24 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i5-4670 CPU @ 3.40GHz CPU Speed 3392 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Counters=3
  • 2-bit up counter=1
  • 3-bit up counter=1
  • 32-bit up counter=1
 Registers=16
  • Flip-Flops=16
 		MiscellaneousStatistics
  • AGG_BONDED_IO=15
  • AGG_IO=15
  • AGG_SLICE=37
  • NUM_4_INPUT_LUT=66
  • NUM_BONDED_IOB=15
  • NUM_BUFGMUX=1
  • NUM_CYMUX=39
  • NUM_LUT_RT=31
  • NUM_SLICEL=37
  • NUM_SLICE_FF=53
  • NUM_XOR=33
 		NetStatistics
  • NumNets_Active=103
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=33
  • NumNodesOfType_Active_CNTRLPIN=32
  • NumNodesOfType_Active_DOUBLE=101
  • NumNodesOfType_Active_DUMMY=147
  • NumNodesOfType_Active_DUMMYESC=4
  • NumNodesOfType_Active_GLOBAL=10
  • NumNodesOfType_Active_HFULLHEX=1
  • NumNodesOfType_Active_HLONG=1
  • NumNodesOfType_Active_INPUT=182
  • NumNodesOfType_Active_IOBOUTPUT=4
  • NumNodesOfType_Active_OMUX=99
  • NumNodesOfType_Active_OUTPUT=84
  • NumNodesOfType_Active_PREBXBY=5
  • NumNodesOfType_Active_VFULLHEX=5
  • NumNodesOfType_Active_VLONG=1
  • NumNodesOfType_Active_VUNIHEX=3
  • NumNodesOfType_Gnd_DOUBLE=2
  • NumNodesOfType_Gnd_INPUT=2
  • NumNodesOfType_Gnd_OMUX=2
  • NumNodesOfType_Gnd_OUTPUT=2
  • NumNodesOfType_Gnd_PREBXBY=2
 SiteStatistics
  • IOB-DIFFM=8
  • IOB-DIFFS=7
  • SLICEL-SLICEM=26
 		SiteSummary
  • BUFGMUX=1
  • BUFGMUX_GCLKMUX=1
  • BUFGMUX_GCLK_BUFFER=1
  • IOB=15
  • IOB_INBUF=4
  • IOB_OUTBUF=11
  • IOB_PAD=15
  • SLICEL=37
  • SLICEL_C1VDD=1
  • SLICEL_CYMUXF=20
  • SLICEL_CYMUXG=19
  • SLICEL_F=33
  • SLICEL_FFX=27
  • SLICEL_FFY=26
  • SLICEL_G=33
  • SLICEL_GNDF=19
  • SLICEL_GNDG=19
  • SLICEL_XORF=17
  • SLICEL_XORG=16
 
Configuration Data
BUFGMUX
  • S=[S_INV:1] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:1]
  • S=[S_INV:1] [S:0]
 FF_SR
  • CK=[CK:3] [CK_INV:0]
  • SRINIT=[SRINIT0:3]
  • SYNC_ATTR=[ASYNC:3]
 IOB
  • O1=[O1_INV:0] [O1:11]
 IOB_OUTBUF
  • IN=[IN_INV:0] [IN:11]
 IOB_PAD
  • DRIVEATTRBOX=[12:11]
  • IOATTRBOX=[LVCMOS33:15]
  • SLEW=[SLOW:11]
 OLOGIC2
  • CLK0=[CLK0_INV:8] [CLK0:0]
 OLOGIC2_OUTFF
  • CK0=[CK0_INV:8] [CK0:0]
  • OUTFFTYPE=[LATCH:8]
  • SRINIT_OQ=[0:8]
 REG_SR
  • CK=[CK:50] [CK_INV:0]
  • LATCH_OR_FF=[FF:50]
  • SRINIT=[SRINIT0:49] [SRINIT1:1]
  • SYNC_ATTR=[ASYNC:50]
 SLICEL
  • BX=[BX_INV:2] [BX:3]
  • BY=[BY:3] [BY_INV:0]
  • CE=[CE:2] [CE_INV:0]
  • CIN=[CIN_INV:0] [CIN:19]
  • CLK=[CLK:33] [CLK_INV:0]
  • SR=[SR:30] [SR_INV:0]
 SLICEL_CYMUXF
  • 0=[0:20] [0_INV:0]
  • 1=[1_INV:0] [1:20]
 SLICEL_CYMUXG
  • 0=[0:19] [0_INV:0]
 SLICEL_FFX
  • CE=[CE:1] [CE_INV:0]
  • CK=[CK:27] [CK_INV:0]
  • D=[D:25] [D_INV:2]
  • FFX_INIT_ATTR=[INIT0:27]
  • FFX_SR_ATTR=[SRLOW:27]
  • LATCH_OR_FF=[FF:27]
  • SR=[SR:25] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:27]
 SLICEL_FFY
  • CE=[CE:2] [CE_INV:0]
  • CK=[CK:26] [CK_INV:0]
  • D=[D:26] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:25] [INIT1:1]
  • FFY_SR_ATTR=[SRLOW:26]
  • LATCH_OR_FF=[FF:26]
  • SR=[SR:24] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:26]
 SLICEL_XORF
  • 1=[1_INV:0] [1:17]
 SLICEX
  • CLK=[CLK:10] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
 BUFGMUX
  • I0=1
  • O=1
  • S=1
 BUFGMUX_GCLKMUX
  • I0=1
  • OUT=1
  • S=1
 BUFGMUX_GCLK_BUFFER
  • IN=1
  • OUT=1
 BUFG_BUFG
  • I0=1
  • O=1
 CARRY4
  • CIN=7
  • CO3=7
  • CYINIT=1
  • DI0=8
  • DI1=8
  • DI2=8
  • DI3=7
  • O0=8
  • O1=8
  • O2=8
  • O3=8
  • S0=8
  • S1=8
  • S2=8
  • S3=8
 FF_SR
  • CK=3
  • D=3
  • Q=3
  • SR=3
 HARD0
  • 0=1
 IOB
  • I=4
  • O1=11
  • PAD=15
 IOB_IMUX
  • I=4
  • OUT=4
 IOB_INBUF
  • IN=4
  • OUT=4
 IOB_OUTBUF
  • IN=11
  • OUT=11
 IOB_PAD
  • PAD=15
 LUT5
  • A1=3
  • A2=3
  • A3=3
  • A4=2
  • A5=3
  • O5=34
 LUT6
  • A1=7
  • A2=13
  • A3=15
  • A4=55
  • A5=21
  • A6=53
  • O6=56
 OLOGIC2
  • CLK0=8
  • D1=8
  • OQ=8
 OLOGIC2_OUTFF
  • CK0=8
  • D1=8
  • Q=8
 PAD
  • PAD=15
 REG_SR
  • CE=2
  • CK=50
  • D=50
  • Q=50
  • SR=46
 SLICEL
  • BX=5
  • BY=3
  • CE=2
  • CIN=19
  • CLK=33
  • COUT=19
  • F1=32
  • F2=16
  • F3=15
  • F4=11
  • G1=33
  • G2=17
  • G3=13
  • G4=9
  • SR=30
  • X=5
  • XQ=27
  • Y=6
  • YQ=26
 SLICEL_C1VDD
  • 1=1
 SLICEL_CYMUXF
  • 0=20
  • 1=20
  • OUT=20
  • S0=20
 SLICEL_CYMUXG
  • 0=19
  • 1=19
  • OUT=19
  • S0=19
 SLICEL_F
  • A1=32
  • A2=16
  • A3=15
  • A4=11
  • D=33
 SLICEL_FFX
  • CE=1
  • CK=27
  • D=27
  • Q=27
  • SR=25
 SLICEL_FFY
  • CE=2
  • CK=26
  • D=26
  • Q=26
  • SR=24
 SLICEL_G
  • A1=33
  • A2=17
  • A3=13
  • A4=9
  • D=33
 SLICEL_GNDF
  • 0=19
 SLICEL_GNDG
  • 0=19
 SLICEL_XORF
  • 0=17
  • 1=17
  • O=17
 SLICEL_XORG
  • 0=16
  • 1=16
  • O=16
 SLICEX
  • A=3
  • A1=6
  • A2=8
  • A3=8
  • A4=10
  • A5=8
  • A6=8
  • AMUX=1
  • AQ=8
  • AX=1
  • B=2
  • B1=1
  • B2=3
  • B3=3
  • B4=6
  • B5=5
  • B6=6
  • BQ=6
  • BX=2
  • C=3
  • C1=1
  • C2=2
  • C3=2
  • C4=3
  • C5=4
  • C6=4
  • CE=1
  • CLK=10
  • CMUX=1
  • CQ=3
  • CX=2
  • D=3
  • D1=2
  • D2=2
  • D3=3
  • D4=4
  • D5=4
  • D6=4
  • DMUX=1
  • DQ=1
  • SR=7
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s200-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s200-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
Start 0 0 0 0 0 0 0
_impact 93 72 0 0 0 0 0
bitgen 742 737 0 0 0 0 0
edif2ngd 1 1 0 0 0 0 0
map 876 748 0 0 0 0 0
netgen 9 9 0 0 0 0 0
ngc2edif 3 3 0 0 0 0 0
ngcbuild 9 9 0 0 0 0 0
ngdbuild 942 931 0 0 0 0 0
obngc 9 9 0 0 0 0 0
par 745 740 3 0 0 0 0
trce 717 717 0 0 0 0 0
xst 1384 1277 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/pn_db_nsw_select_ip.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_SelectedInstanceHierarchicalPath=/Testbench PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Constraints Editor
PROP_intProjectCreationTimestamp=2015-02-03T20:12:54 PROP_intWbtProjectID=114E1D12B0454F159FABD1D59B0B2CF4
PROP_intWbtProjectIteration=5 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_lockPinsUcfFile=changed
PROP_selectedSimRootSourceNode_behav=work.Testbench PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true PROP_DevFamily=Spartan3
PROP_DevDevice=xc3s200 PROP_DevFamilyPMName=spartan3
PROP_DevPackage=tq144 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-4 PROP_PreferredLanguage=Verilog
FILE_UCF=1 FILE_VERILOG=2
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FD=1 NGDBUILD_NUM_FDC=49 NGDBUILD_NUM_FDE=3
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_INV=3 NGDBUILD_NUM_LUT1=31
NGDBUILD_NUM_LUT2=5 NGDBUILD_NUM_LUT3=5 NGDBUILD_NUM_LUT3_D=3 NGDBUILD_NUM_LUT4=19
NGDBUILD_NUM_LUT4_L=1 NGDBUILD_NUM_MUXCY=39 NGDBUILD_NUM_OBUF=11 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=32
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FD=1 NGDBUILD_NUM_FDC=49 NGDBUILD_NUM_FDE=3
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=3
NGDBUILD_NUM_LUT1=31 NGDBUILD_NUM_LUT2=5 NGDBUILD_NUM_LUT3=5 NGDBUILD_NUM_LUT3_D=3
NGDBUILD_NUM_LUT4=19 NGDBUILD_NUM_LUT4_L=1 NGDBUILD_NUM_MUXCY=39 NGDBUILD_NUM_OBUF=11
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=32
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ifmt=mixed -ofn=<design_top> -ofmt=NGC
-p=xc3s200-4-tq144 -top=<design_top> -opt_mode=Speed -opt_level=1
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -verilog2001=YES
-fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No -fsm_style=LUT
-ram_extract=Yes -ram_style=Auto -rom_extract=Yes -shreg_extract=YES
-rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES -async_to_sync=NO
-mult_style=Auto -iobuf=YES -max_fanout=500 -bufg=8
-register_duplication=YES -register_balancing=No -optimize_primitives=NO -use_clock_enable=Yes
-use_sync_set=Yes -use_sync_reset=Yes -iob=Auto -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5