HI-TECH Software PICC-18 Compiler V9.80 () Linker command line: --edf=C:\Program Files (x86)\HI-TECH Software\PICC-18\9.80\dat\en_msgs.txt \ -cs -h+Test.sym -z -Q18F452 -ol.obj -MTest.map -E1 -ver=PICC-18 \ -ACODE=00h-03FFFhx2 -ACONST=00h-07FFFh -ASMALLCONST=0600h-06FFhx122 \ -AMEDIUMCONST=0600h-07FFFh -ACOMRAM=01h-07Fh -AABS1=00h-05FFh \ -ABIGRAM=01h-05FFh -ARAM=080h-0FFh,0100h-01FFhx5 -ABANK0=080h-0FFh \ -ABANK1=0100h-01FFh -ABANK2=0200h-02FFh -ABANK3=0300h-03FFh \ -ABANK4=0400h-04FFh -ABANK5=0500h-05FFh -ASFR=0F80h-0FFFh \ -preset_vec=00h,intcode=08h,intcodelo,powerup,init,end_init \ -pramtop=0600h -psmallconst=SMALLCONST -pmediumconst=MEDIUMCONST \ -pconst=CONST -AFARRAM=00h-00h -ACONFIG=0300000h-030000Dh -pconfig=CONFIG \ -AIDLOC=0200000h-0200007h -pidloc=IDLOC -AEEDATA=0F00000h-0F000FFh \ -peeprom_data=EEDATA \ -prdata=COMRAM,nvrram=COMRAM,nvbit=COMRAM,rbss=COMRAM,rbit=COMRAM \ -pfarbss=FARRAM,fardata=FARRAM \ -pintsave_regs=BIGRAM,bigbss=BIGRAM,bigdata=BIGRAM -pbss=RAM \ -pidata=CODE,irdata=CODE,ibigdata=CODE,ifardata=CODE startup.obj Test.obj Object code version is 3.10 Machine type is 18F452 Call graph: (short form) Name Link Load Length Selector Space Scale startup.obj end_init 32 32 4 4 0 reset_vec 0 0 4 0 0 Test.obj intcode 8 8 2A 4 0 smallcons 600 600 A2 300 0 text8 90E 90E 18 351 0 text7 878 878 6A 351 0 text6 950 950 A 351 0 text5 95A 95A A 351 0 text4 76E 76E 94 351 0 text3 6A2 6A2 CC 351 0 text2 802 802 76 351 0 text1 8E2 8E2 2C 351 0 text0 93C 93C 14 351 0 cstackCOM B B 8 1 1 bssCOMRAM 1 1 A 1 1 cinit 926 926 16 351 0 TOTAL Name Link Load Length Space CLASS CODE end_init 32 32 4 0 intcode 8 8 2A 0 reset_vec 0 0 4 0 text8 90E 90E 18 0 text7 878 878 6A 0 text6 950 950 A 0 text5 95A 95A A 0 text4 76E 76E 94 0 text3 6A2 6A2 CC 0 text2 802 802 76 0 text1 8E2 8E2 2C 0 text0 93C 93C 14 0 cinit 926 926 16 0 CLASS CONST CLASS SMALLCONST smallcons 600 600 A2 0 CLASS MEDIUMCONST CLASS COMRAM cstackCOM B B 8 1 bssCOMRAM 1 1 A 1 CLASS ABS1 CLASS BIGRAM CLASS RAM CLASS BANK0 CLASS BANK1 CLASS BANK2 CLASS BANK3 CLASS BANK4 CLASS BANK5 CLASS SFR CLASS FARRAM CLASS CONFIG CLASS IDLOC CLASS EEDATA SEGMENTS Name Load Length Top Selector Space Class reset_vec 000000 000004 000004 0 0 CODE bssCOMRAM 000001 000012 000013 1 1 COMRAM intcode 000008 00002E 000036 4 0 CODE smallconst 000600 0000A2 0006A2 300 0 SMALLCON text3 0006A2 0002C2 000964 351 0 CODE UNUSED ADDRESS RANGES Name Unused Largest block Delta BANK0 080-0FF 80 BANK1 100-1FF 100 BANK2 200-2FF 100 BANK3 300-3FF 100 BANK4 400-4FF 100 BANK5 500-5FF 100 BIGRAM 013-5FF 5ED CODE 004-007 4 036-5FF 5CA 964-7FFF 369C COMRAM 013-07F 6D CONFIG 300000-30000D E CONST 004-007 4 036-5FF 5CA 964-7FFF 769C EEDATA F00000-F000FF 100 IDLOC 200000-200007 8 MEDIUMCONST 964-7FFF 769C RAM 080-5FF 100 SFR F80-FFF 80 SMALLCONST 964-7FFF 100 Symbol Table ??_HIGH_ISR cstackCOMRAM 00B ??_SysInit cstackCOMRAM 010 ??_TLCD_TEST cstackCOMRAM 00F ??_Tlcd_init cstackCOMRAM 00F ??_clcd_line1 cstackCOMRAM 00F ??_clcd_line2 cstackCOMRAM 00F ??_dsp_cmd_TLCD cstackCOMRAM 00D ??_dsp_str_TLCD cstackCOMRAM 00D ??_flilflop_Enable cstackCOMRAM 00C ??_main cstackCOMRAM 013 ?_HIGH_ISR cstackCOMRAM 00B ?_SysInit cstackCOMRAM 00B ?_TLCD_TEST cstackCOMRAM 00B ?_Tlcd_init cstackCOMRAM 00B ?_clcd_line1 cstackCOMRAM 00B ?_clcd_line2 cstackCOMRAM 00B ?_dsp_cmd_TLCD cstackCOMRAM 00B ?_dsp_str_TLCD cstackCOMRAM 00B ?_flilflop_Enable cstackCOMRAM 00B ?_main cstackCOMRAM 00B HIGH_ISR@cnt bssCOMRAM 001 TLCD_TEST@i cstackCOMRAM 011 TLCD_TEST@j bssCOMRAM 003 TLCD_TEST@k bssCOMRAM 005 _HIGH_ISR intcode 008 _INTCON (abs) FF2 _PORTB (abs) F81 _PORTC (abs) F82 _PORTD (abs) F83 _PORTE (abs) F84 _SysInit text1 8E2 _T0CON (abs) FD5 _TLCD_TEST text3 6A2 _TMR0L (abs) FD6 _TRISA (abs) F92 _TRISB (abs) F93 _TRISC (abs) F94 _TRISD (abs) F95 _TRISE (abs) F96 _Tlcd_init text2 802 __HRAM (abs) 000 __Habs1 abs1 000 __Hbank0 bank0 000 __Hbank1 bank1 000 __Hbank2 bank2 000 __Hbank3 bank3 000 __Hbank4 bank4 000 __Hbank5 bank5 000 __Hbigbss bigbss 000 __Hbigdata bigdata 000 __Hbigram bigram 000 __Hbss bss 000 __HbssCOMRAM bssCOMRAM 000 __Hcinit cinit 000 __Hclrtext clrtext 000 __Hcomram comram 000 __Hconfig config 000 __Hconst const 000 __HcstackCOMRAM cstackCOMRAM 000 __Hdata data 000 __Heeprom_data eeprom_data 000 __Hend_init end_init 036 __Hfarbss farbss 000 __Hfardata fardata 000 __Hibigdata ibigdata 000 __Hidata idata 000 __Hidloc idloc 000 __Hifardata ifardata 000 __Hinit init 032 __Hintcode intcode 032 __Hintcode_body intcode_body 000 __Hintcodelo intcodelo 032 __Hintentry intentry 000 __Hintret intret 000 __Hintsave_regs intsave_regs 000 __Hirdata irdata 000 __Hmediumconst mediumconst 000 __Hnvbit nvbit 000 __Hnvrram nvrram 000 __Hpa_nodes pa_nodes 000 __Hparam rparam 000 __Hpowerup powerup 032 __Hram ram 000 __Hramtop ramtop 600 __Hrbit rbit 000 __Hrbss rbss 000 __Hrdata rdata 000 __Hreset_vec reset_vec 004 __Hrparam rparam 000 __Hsfr sfr 000 __Hsmallconst smallconst 6A2 __Hstruct struct 000 __Htemp temp 000 __Htext text 000 __Htext0 text0 000 __Htext1 text1 000 __Htext2 text2 000 __Htext3 text3 000 __Htext4 text4 000 __Htext5 text5 000 __Htext6 text6 000 __Htext7 text7 000 __Htext8 text8 000 __LRAM (abs) 001 __Labs1 abs1 000 __Lbank0 bank0 000 __Lbank1 bank1 000 __Lbank2 bank2 000 __Lbank3 bank3 000 __Lbank4 bank4 000 __Lbank5 bank5 000 __Lbigbss bigbss 000 __Lbigdata bigdata 000 __Lbigram bigram 000 __Lbss bss 000 __LbssCOMRAM bssCOMRAM 000 __Lcinit cinit 000 __Lclrtext clrtext 000 __Lcomram comram 000 __Lconfig config 000 __Lconst const 000 __LcstackCOMRAM cstackCOMRAM 000 __Ldata data 000 __Leeprom_data eeprom_data 000 __Lend_init end_init 032 __Lfarbss farbss 000 __Lfardata fardata 000 __Libigdata ibigdata 000 __Lidata idata 000 __Lidloc idloc 000 __Lifardata ifardata 000 __Linit init 032 __Lintcode intcode 008 __Lintcode_body intcode_body 000 __Lintcodelo intcodelo 032 __Lintentry intentry 000 __Lintret intret 000 __Lintsave_regs intsave_regs 000 __Lirdata irdata 000 __Lmediumconst mediumconst 000 __Lnvbit nvbit 000 __Lnvrram nvrram 000 __Lpa_nodes pa_nodes 000 __Lparam rparam 000 __Lpowerup powerup 032 __Lram ram 000 __Lramtop ramtop 600 __Lrbit rbit 000 __Lrbss rbss 000 __Lrdata rdata 000 __Lreset_vec reset_vec 000 __Lrparam rparam 000 __Lsfr sfr 000 __Lsmallconst smallconst 600 __Lstruct struct 000 __Ltemp temp 000 __Ltext text 000 __Ltext0 text0 000 __Ltext1 text1 000 __Ltext2 text2 000 __Ltext3 text3 000 __Ltext4 text4 000 __Ltext5 text5 000 __Ltext6 text6 000 __Ltext7 text7 000 __Ltext8 text8 000 __S0 (abs) 964 __S1 (abs) 013 __accesstop (abs) 080 __activetblptr (abs) 002 __end_of_HIGH_ISR intcode 032 __end_of_SysInit text1 90E __end_of_TLCD_TEST text3 748 __end_of_Tlcd_init text2 878 __end_of_clcd_line1 text5 964 __end_of_clcd_line2 text6 95A __end_of_dsp_cmd_TLCD text7 8E2 __end_of_dsp_str_TLCD text4 802 __end_of_flilflop_Enable text8 926 __end_of_main text1 8E2 __mediumconst mediumconst 000 __pbssCOMRAM bssCOMRAM 001 __pcinit cinit 926 __pcstackCOMRAM cstackCOMRAM 00B __pintcode intcode 008 __psmallconst smallconst 600 __ptext0 text0 93C __ptext1 text1 8E2 __ptext2 text2 802 __ptext3 text3 6A2 __ptext4 text4 76E __ptext5 text5 95A __ptext6 text6 950 __ptext7 text7 878 __ptext8 text8 90E __ramtop ramtop 600 __size_of_HIGH_ISR (abs) 000 __size_of_SysInit (abs) 000 __size_of_TLCD_TEST (abs) 000 __size_of_Tlcd_init (abs) 000 __size_of_clcd_line1 (abs) 000 __size_of_clcd_line2 (abs) 000 __size_of_dsp_cmd_TLCD (abs) 000 __size_of_dsp_str_TLCD (abs) 000 __size_of_flilflop_Enable (abs) 000 __size_of_main (abs) 000 __smallconst smallconst 600 _clcd_line1 text5 95A _clcd_line2 text6 950 _dsp_cmd_TLCD text7 878 _dsp_str_TLCD text4 76E _flilflop_Enable text8 90E _main text0 93C _str smallconst 600 _toggle_cnt bssCOMRAM 007 dsp_cmd_TLCD@buff_con bssCOMRAM 009 dsp_cmd_TLCD@n cstackCOMRAM 00E dsp_str_TLCD@buff_con bssCOMRAM 00A dsp_str_TLCD@n cstackCOMRAM 00E end_of_initialization cinit 932 flilflop_Enable@Add cstackCOMRAM 00C flilflop_Enable@OuputData cstackCOMRAM 00B intlevel0 text 000 intlevel1 text 000 intlevel2 text 000 intlevel3 text 000 start init 032 start_initialization cinit 926