Version 3.2 HI-TECH Software Intermediate Code
"1852 C:\Program Files (x86)\HI-TECH Software\PICC-18\9.80\include\pic18f452.h
[v _SSPBUF `Vuc ~T0 0 e@4041 ]
"3656
[v _SSPIF `Vb ~T0 0 e@31987 ]
"186 C:\Program Files (x86)\HI-TECH Software\PICC-18\9.80\include\pic18.h
[v __delay `(v ~T0 0 ef1`ul ]
[p i __delay ]
"70 C:\Program Files (x86)\HI-TECH Software\PICC-18\9.80\include\pic18f452.h
[v _PORTB `Vuc ~T0 0 e@3969 ]
"698
[v _TRISC `Vuc ~T0 0 e@3988 ]
"627
[v _TRISB `Vuc ~T0 0 e@3987 ]
"1722
[v _SSPSTAT `Vuc ~T0 0 e@4039 ]
"1700
[v _SSPCON1 `Vuc ~T0 0 e@4038 ]
"3654
[v _SSPIE `Vb ~T0 0 e@31979 ]
[p mainexit ]
[; ;pic18f452.h: 17: extern volatile unsigned char PORTA @ 0xF80;
"19 C:\Program Files (x86)\HI-TECH Software\PICC-18\9.80\include\pic18f452.h
[; ;pic18f452.h: 19: asm("PORTA equ 0F80h");
[; <" PORTA equ 0F80h ;# ">
[; ;pic18f452.h: 22: extern volatile union {
[; ;pic18f452.h: 23: struct {
[; ;pic18f452.h: 24: unsigned RA0 :1;
[; ;pic18f452.h: 25: unsigned RA1 :1;
[; ;pic18f452.h: 26: unsigned RA2 :1;
[; ;pic18f452.h: 27: unsigned RA3 :1;
[; ;pic18f452.h: 28: unsigned RA4 :1;
[; ;pic18f452.h: 29: unsigned RA5 :1;
[; ;pic18f452.h: 30: unsigned RA6 :1;
[; ;pic18f452.h: 31: };
[; ;pic18f452.h: 32: struct {
[; ;pic18f452.h: 33: unsigned RA :8;
[; ;pic18f452.h: 34: };
[; ;pic18f452.h: 35: struct {
[; ;pic18f452.h: 36: unsigned AN0 :1;
[; ;pic18f452.h: 37: unsigned AN1 :1;
[; ;pic18f452.h: 38: unsigned AN2 :1;
[; ;pic18f452.h: 39: unsigned AN3 :1;
[; ;pic18f452.h: 40: unsigned :1;
[; ;pic18f452.h: 41: unsigned AN4 :1;
[; ;pic18f452.h: 42: unsigned OSC2 :1;
[; ;pic18f452.h: 43: };
[; ;pic18f452.h: 44: struct {
[; ;pic18f452.h: 45: unsigned :2;
[; ;pic18f452.h: 46: unsigned VREFM :1;
[; ;pic18f452.h: 47: unsigned VREFP :1;
[; ;pic18f452.h: 48: unsigned T0CKI :1;
[; ;pic18f452.h: 49: unsigned SS :1;
[; ;pic18f452.h: 50: unsigned CLKO :1;
[; ;pic18f452.h: 51: };
[; ;pic18f452.h: 52: struct {
[; ;pic18f452.h: 53: unsigned :5;
[; ;pic18f452.h: 54: unsigned LVDIN :1;
[; ;pic18f452.h: 55: };
[; ;pic18f452.h: 56: struct {
[; ;pic18f452.h: 57: unsigned :7;
[; ;pic18f452.h: 58: unsigned RA7 :1;
[; ;pic18f452.h: 59: };
[; ;pic18f452.h: 60: struct {
[; ;pic18f452.h: 61: unsigned :7;
[; ;pic18f452.h: 62: unsigned RJPU :1;
[; ;pic18f452.h: 63: };
[; ;pic18f452.h: 64: struct {
[; ;pic18f452.h: 65: unsigned ULPWUIN :1;
[; ;pic18f452.h: 66: };
[; ;pic18f452.h: 67: } PORTAbits @ 0xF80;
[; ;pic18f452.h: 70: extern volatile unsigned char PORTB @ 0xF81;
"72
[; ;pic18f452.h: 72: asm("PORTB equ 0F81h");
[; <" PORTB equ 0F81h ;# ">
[; ;pic18f452.h: 75: extern volatile union {
[; ;pic18f452.h: 76: struct {
[; ;pic18f452.h: 77: unsigned RB0 :1;
[; ;pic18f452.h: 78: unsigned RB1 :1;
[; ;pic18f452.h: 79: unsigned RB2 :1;
[; ;pic18f452.h: 80: unsigned RB3 :1;
[; ;pic18f452.h: 81: unsigned RB4 :1;
[; ;pic18f452.h: 82: unsigned RB5 :1;
[; ;pic18f452.h: 83: unsigned RB6 :1;
[; ;pic18f452.h: 84: unsigned RB7 :1;
[; ;pic18f452.h: 85: };
[; ;pic18f452.h: 86: struct {
[; ;pic18f452.h: 87: unsigned RB :8;
[; ;pic18f452.h: 88: };
[; ;pic18f452.h: 89: struct {
[; ;pic18f452.h: 90: unsigned INT0 :1;
[; ;pic18f452.h: 91: unsigned INT1 :1;
[; ;pic18f452.h: 92: unsigned INT2 :1;
[; ;pic18f452.h: 93: unsigned CCP2 :1;
[; ;pic18f452.h: 94: unsigned :1;
[; ;pic18f452.h: 95: unsigned PGM :1;
[; ;pic18f452.h: 96: unsigned PGC :1;
[; ;pic18f452.h: 97: unsigned PGD :1;
[; ;pic18f452.h: 98: };
[; ;pic18f452.h: 99: struct {
[; ;pic18f452.h: 100: unsigned :3;
[; ;pic18f452.h: 101: unsigned CCP2A :1;
[; ;pic18f452.h: 102: };
[; ;pic18f452.h: 103: struct {
[; ;pic18f452.h: 104: unsigned :3;
[; ;pic18f452.h: 105: unsigned CCP2_PA2 :1;
[; ;pic18f452.h: 106: };
[; ;pic18f452.h: 107: } PORTBbits @ 0xF81;
[; ;pic18f452.h: 110: extern volatile unsigned char PORTC @ 0xF82;
"112
[; ;pic18f452.h: 112: asm("PORTC equ 0F82h");
[; <" PORTC equ 0F82h ;# ">
[; ;pic18f452.h: 115: extern volatile union {
[; ;pic18f452.h: 116: struct {
[; ;pic18f452.h: 117: unsigned RC0 :1;
[; ;pic18f452.h: 118: unsigned RC1 :1;
[; ;pic18f452.h: 119: unsigned RC2 :1;
[; ;pic18f452.h: 120: unsigned RC3 :1;
[; ;pic18f452.h: 121: unsigned RC4 :1;
[; ;pic18f452.h: 122: unsigned RC5 :1;
[; ;pic18f452.h: 123: unsigned RC6 :1;
[; ;pic18f452.h: 124: unsigned RC7 :1;
[; ;pic18f452.h: 125: };
[; ;pic18f452.h: 126: struct {
[; ;pic18f452.h: 127: unsigned RC :8;
[; ;pic18f452.h: 128: };
[; ;pic18f452.h: 129: struct {
[; ;pic18f452.h: 130: unsigned T1OSO :1;
[; ;pic18f452.h: 131: unsigned T1OSI :1;
[; ;pic18f452.h: 132: unsigned :1;
[; ;pic18f452.h: 133: unsigned SCK :1;
[; ;pic18f452.h: 134: unsigned SDI :1;
[; ;pic18f452.h: 135: unsigned SDO :1;
[; ;pic18f452.h: 136: unsigned TX :1;
[; ;pic18f452.h: 137: unsigned RX :1;
[; ;pic18f452.h: 138: };
[; ;pic18f452.h: 139: struct {
[; ;pic18f452.h: 140: unsigned T1CKI :1;
[; ;pic18f452.h: 141: unsigned CCP2 :1;
[; ;pic18f452.h: 142: unsigned CCP1 :1;
[; ;pic18f452.h: 143: unsigned SCL :1;
[; ;pic18f452.h: 144: unsigned SDA :1;
[; ;pic18f452.h: 145: unsigned :1;
[; ;pic18f452.h: 146: unsigned CK :1;
[; ;pic18f452.h: 147: unsigned DT :1;
[; ;pic18f452.h: 148: };
[; ;pic18f452.h: 149: struct {
[; ;pic18f452.h: 150: unsigned :2;
[; ;pic18f452.h: 151: unsigned PA1 :1;
[; ;pic18f452.h: 152: };
[; ;pic18f452.h: 153: struct {
[; ;pic18f452.h: 154: unsigned :1;
[; ;pic18f452.h: 155: unsigned PA2 :1;
[; ;pic18f452.h: 156: };
[; ;pic18f452.h: 157: } PORTCbits @ 0xF82;
[; ;pic18f452.h: 160: extern volatile unsigned char PORTD @ 0xF83;
"162
[; ;pic18f452.h: 162: asm("PORTD equ 0F83h");
[; <" PORTD equ 0F83h ;# ">
[; ;pic18f452.h: 165: extern volatile union {
[; ;pic18f452.h: 166: struct {
[; ;pic18f452.h: 167: unsigned RD0 :1;
[; ;pic18f452.h: 168: unsigned RD1 :1;
[; ;pic18f452.h: 169: unsigned RD2 :1;
[; ;pic18f452.h: 170: unsigned RD3 :1;
[; ;pic18f452.h: 171: unsigned RD4 :1;
[; ;pic18f452.h: 172: unsigned RD5 :1;
[; ;pic18f452.h: 173: unsigned RD6 :1;
[; ;pic18f452.h: 174: unsigned RD7 :1;
[; ;pic18f452.h: 175: };
[; ;pic18f452.h: 176: struct {
[; ;pic18f452.h: 177: unsigned RD :8;
[; ;pic18f452.h: 178: };
[; ;pic18f452.h: 179: struct {
[; ;pic18f452.h: 180: unsigned PSP0 :1;
[; ;pic18f452.h: 181: unsigned PSP1 :1;
[; ;pic18f452.h: 182: unsigned PSP2 :1;
[; ;pic18f452.h: 183: unsigned PSP3 :1;
[; ;pic18f452.h: 184: unsigned PSP4 :1;
[; ;pic18f452.h: 185: unsigned PSP5 :1;
[; ;pic18f452.h: 186: unsigned PSP6 :1;
[; ;pic18f452.h: 187: unsigned PSP7 :1;
[; ;pic18f452.h: 188: };
[; ;pic18f452.h: 189: struct {
[; ;pic18f452.h: 190: unsigned :7;
[; ;pic18f452.h: 191: unsigned SS2 :1;
[; ;pic18f452.h: 192: };
[; ;pic18f452.h: 193: } PORTDbits @ 0xF83;
[; ;pic18f452.h: 196: extern volatile unsigned char PORTE @ 0xF84;
"198
[; ;pic18f452.h: 198: asm("PORTE equ 0F84h");
[; <" PORTE equ 0F84h ;# ">
[; ;pic18f452.h: 201: extern volatile union {
[; ;pic18f452.h: 202: struct {
[; ;pic18f452.h: 203: unsigned RE0 :1;
[; ;pic18f452.h: 204: unsigned RE1 :1;
[; ;pic18f452.h: 205: unsigned RE2 :1;
[; ;pic18f452.h: 206: };
[; ;pic18f452.h: 207: struct {
[; ;pic18f452.h: 208: unsigned RE :8;
[; ;pic18f452.h: 209: };
[; ;pic18f452.h: 210: struct {
[; ;pic18f452.h: 211: unsigned AN5 :1;
[; ;pic18f452.h: 212: unsigned AN6 :1;
[; ;pic18f452.h: 213: unsigned AN7 :1;
[; ;pic18f452.h: 214: };
[; ;pic18f452.h: 215: struct {
[; ;pic18f452.h: 216: unsigned RD :1;
[; ;pic18f452.h: 217: unsigned WR :1;
[; ;pic18f452.h: 218: unsigned CS :1;
[; ;pic18f452.h: 219: };
[; ;pic18f452.h: 220: struct {
[; ;pic18f452.h: 221: unsigned :2;
[; ;pic18f452.h: 222: unsigned CCP10 :1;
[; ;pic18f452.h: 223: };
[; ;pic18f452.h: 224: struct {
[; ;pic18f452.h: 225: unsigned :7;
[; ;pic18f452.h: 226: unsigned CCP2E :1;
[; ;pic18f452.h: 227: };
[; ;pic18f452.h: 228: struct {
[; ;pic18f452.h: 229: unsigned :6;
[; ;pic18f452.h: 230: unsigned CCP6E :1;
[; ;pic18f452.h: 231: };
[; ;pic18f452.h: 232: struct {
[; ;pic18f452.h: 233: unsigned :5;
[; ;pic18f452.h: 234: unsigned CCP7E :1;
[; ;pic18f452.h: 235: };
[; ;pic18f452.h: 236: struct {
[; ;pic18f452.h: 237: unsigned :4;
[; ;pic18f452.h: 238: unsigned CCP8E :1;
[; ;pic18f452.h: 239: };
[; ;pic18f452.h: 240: struct {
[; ;pic18f452.h: 241: unsigned :3;
[; ;pic18f452.h: 242: unsigned CCP9E :1;
[; ;pic18f452.h: 243: };
[; ;pic18f452.h: 244: struct {
[; ;pic18f452.h: 245: unsigned :7;
[; ;pic18f452.h: 246: unsigned PA2E :1;
[; ;pic18f452.h: 247: };
[; ;pic18f452.h: 248: struct {
[; ;pic18f452.h: 249: unsigned :6;
[; ;pic18f452.h: 250: unsigned PB1E :1;
[; ;pic18f452.h: 251: };
[; ;pic18f452.h: 252: struct {
[; ;pic18f452.h: 253: unsigned :2;
[; ;pic18f452.h: 254: unsigned PB2 :1;
[; ;pic18f452.h: 255: };
[; ;pic18f452.h: 256: struct {
[; ;pic18f452.h: 257: unsigned :4;
[; ;pic18f452.h: 258: unsigned PB3E :1;
[; ;pic18f452.h: 259: };
[; ;pic18f452.h: 260: struct {
[; ;pic18f452.h: 261: unsigned :5;
[; ;pic18f452.h: 262: unsigned PC1E :1;
[; ;pic18f452.h: 263: };
[; ;pic18f452.h: 264: struct {
[; ;pic18f452.h: 265: unsigned :1;
[; ;pic18f452.h: 266: unsigned PC2 :1;
[; ;pic18f452.h: 267: };
[; ;pic18f452.h: 268: struct {
[; ;pic18f452.h: 269: unsigned :3;
[; ;pic18f452.h: 270: unsigned PC3E :1;
[; ;pic18f452.h: 271: };
[; ;pic18f452.h: 272: struct {
[; ;pic18f452.h: 273: unsigned PD2 :1;
[; ;pic18f452.h: 274: };
[; ;pic18f452.h: 275: struct {
[; ;pic18f452.h: 276: unsigned RDE :1;
[; ;pic18f452.h: 277: };
[; ;pic18f452.h: 278: struct {
[; ;pic18f452.h: 279: unsigned :3;
[; ;pic18f452.h: 280: unsigned RE3 :1;
[; ;pic18f452.h: 281: };
[; ;pic18f452.h: 282: struct {
[; ;pic18f452.h: 283: unsigned :4;
[; ;pic18f452.h: 284: unsigned RE4 :1;
[; ;pic18f452.h: 285: };
[; ;pic18f452.h: 286: struct {
[; ;pic18f452.h: 287: unsigned :5;
[; ;pic18f452.h: 288: unsigned RE5 :1;
[; ;pic18f452.h: 289: };
[; ;pic18f452.h: 290: struct {
[; ;pic18f452.h: 291: unsigned :6;
[; ;pic18f452.h: 292: unsigned RE6 :1;
[; ;pic18f452.h: 293: };
[; ;pic18f452.h: 294: struct {
[; ;pic18f452.h: 295: unsigned :7;
[; ;pic18f452.h: 296: unsigned RE7 :1;
[; ;pic18f452.h: 297: };
[; ;pic18f452.h: 298: struct {
[; ;pic18f452.h: 299: unsigned :1;
[; ;pic18f452.h: 300: unsigned WRE :1;
[; ;pic18f452.h: 301: };
[; ;pic18f452.h: 302: } PORTEbits @ 0xF84;
[; ;pic18f452.h: 305: extern volatile unsigned char LATA @ 0xF89;
"307
[; ;pic18f452.h: 307: asm("LATA equ 0F89h");
[; <" LATA equ 0F89h ;# ">
[; ;pic18f452.h: 310: extern volatile union {
[; ;pic18f452.h: 311: struct {
[; ;pic18f452.h: 312: unsigned LATA0 :1;
[; ;pic18f452.h: 313: unsigned LATA1 :1;
[; ;pic18f452.h: 314: unsigned LATA2 :1;
[; ;pic18f452.h: 315: unsigned LATA3 :1;
[; ;pic18f452.h: 316: unsigned LATA4 :1;
[; ;pic18f452.h: 317: unsigned LATA5 :1;
[; ;pic18f452.h: 318: unsigned LATA6 :1;
[; ;pic18f452.h: 319: };
[; ;pic18f452.h: 320: struct {
[; ;pic18f452.h: 321: unsigned LATA :8;
[; ;pic18f452.h: 322: };
[; ;pic18f452.h: 323: struct {
[; ;pic18f452.h: 324: unsigned LA0 :1;
[; ;pic18f452.h: 325: };
[; ;pic18f452.h: 326: struct {
[; ;pic18f452.h: 327: unsigned :1;
[; ;pic18f452.h: 328: unsigned LA1 :1;
[; ;pic18f452.h: 329: };
[; ;pic18f452.h: 330: struct {
[; ;pic18f452.h: 331: unsigned :2;
[; ;pic18f452.h: 332: unsigned LA2 :1;
[; ;pic18f452.h: 333: };
[; ;pic18f452.h: 334: struct {
[; ;pic18f452.h: 335: unsigned :3;
[; ;pic18f452.h: 336: unsigned LA3 :1;
[; ;pic18f452.h: 337: };
[; ;pic18f452.h: 338: struct {
[; ;pic18f452.h: 339: unsigned :4;
[; ;pic18f452.h: 340: unsigned LA4 :1;
[; ;pic18f452.h: 341: };
[; ;pic18f452.h: 342: struct {
[; ;pic18f452.h: 343: unsigned :5;
[; ;pic18f452.h: 344: unsigned LA5 :1;
[; ;pic18f452.h: 345: };
[; ;pic18f452.h: 346: struct {
[; ;pic18f452.h: 347: unsigned :6;
[; ;pic18f452.h: 348: unsigned LA6 :1;
[; ;pic18f452.h: 349: };
[; ;pic18f452.h: 350: struct {
[; ;pic18f452.h: 351: unsigned :7;
[; ;pic18f452.h: 352: unsigned LA7 :1;
[; ;pic18f452.h: 353: };
[; ;pic18f452.h: 354: struct {
[; ;pic18f452.h: 355: unsigned :7;
[; ;pic18f452.h: 356: unsigned LATA7 :1;
[; ;pic18f452.h: 357: };
[; ;pic18f452.h: 358: } LATAbits @ 0xF89;
[; ;pic18f452.h: 361: extern volatile unsigned char LATB @ 0xF8A;
"363
[; ;pic18f452.h: 363: asm("LATB equ 0F8Ah");
[; <" LATB equ 0F8Ah ;# ">
[; ;pic18f452.h: 366: extern volatile union {
[; ;pic18f452.h: 367: struct {
[; ;pic18f452.h: 368: unsigned LATB0 :1;
[; ;pic18f452.h: 369: unsigned LATB1 :1;
[; ;pic18f452.h: 370: unsigned LATB2 :1;
[; ;pic18f452.h: 371: unsigned LATB3 :1;
[; ;pic18f452.h: 372: unsigned LATB4 :1;
[; ;pic18f452.h: 373: unsigned LATB5 :1;
[; ;pic18f452.h: 374: unsigned LATB6 :1;
[; ;pic18f452.h: 375: unsigned LATB7 :1;
[; ;pic18f452.h: 376: };
[; ;pic18f452.h: 377: struct {
[; ;pic18f452.h: 378: unsigned LATB :8;
[; ;pic18f452.h: 379: };
[; ;pic18f452.h: 380: struct {
[; ;pic18f452.h: 381: unsigned LB0 :1;
[; ;pic18f452.h: 382: };
[; ;pic18f452.h: 383: struct {
[; ;pic18f452.h: 384: unsigned :1;
[; ;pic18f452.h: 385: unsigned LB1 :1;
[; ;pic18f452.h: 386: };
[; ;pic18f452.h: 387: struct {
[; ;pic18f452.h: 388: unsigned :2;
[; ;pic18f452.h: 389: unsigned LB2 :1;
[; ;pic18f452.h: 390: };
[; ;pic18f452.h: 391: struct {
[; ;pic18f452.h: 392: unsigned :3;
[; ;pic18f452.h: 393: unsigned LB3 :1;
[; ;pic18f452.h: 394: };
[; ;pic18f452.h: 395: struct {
[; ;pic18f452.h: 396: unsigned :4;
[; ;pic18f452.h: 397: unsigned LB4 :1;
[; ;pic18f452.h: 398: };
[; ;pic18f452.h: 399: struct {
[; ;pic18f452.h: 400: unsigned :5;
[; ;pic18f452.h: 401: unsigned LB5 :1;
[; ;pic18f452.h: 402: };
[; ;pic18f452.h: 403: struct {
[; ;pic18f452.h: 404: unsigned :6;
[; ;pic18f452.h: 405: unsigned LB6 :1;
[; ;pic18f452.h: 406: };
[; ;pic18f452.h: 407: struct {
[; ;pic18f452.h: 408: unsigned :7;
[; ;pic18f452.h: 409: unsigned LB7 :1;
[; ;pic18f452.h: 410: };
[; ;pic18f452.h: 411: } LATBbits @ 0xF8A;
[; ;pic18f452.h: 414: extern volatile unsigned char LATC @ 0xF8B;
"416
[; ;pic18f452.h: 416: asm("LATC equ 0F8Bh");
[; <" LATC equ 0F8Bh ;# ">
[; ;pic18f452.h: 419: extern volatile union {
[; ;pic18f452.h: 420: struct {
[; ;pic18f452.h: 421: unsigned LATC0 :1;
[; ;pic18f452.h: 422: unsigned LATC1 :1;
[; ;pic18f452.h: 423: unsigned LATC2 :1;
[; ;pic18f452.h: 424: unsigned LATC3 :1;
[; ;pic18f452.h: 425: unsigned LATC4 :1;
[; ;pic18f452.h: 426: unsigned LATC5 :1;
[; ;pic18f452.h: 427: unsigned LATC6 :1;
[; ;pic18f452.h: 428: unsigned LATC7 :1;
[; ;pic18f452.h: 429: };
[; ;pic18f452.h: 430: struct {
[; ;pic18f452.h: 431: unsigned LATC :8;
[; ;pic18f452.h: 432: };
[; ;pic18f452.h: 433: struct {
[; ;pic18f452.h: 434: unsigned LC0 :1;
[; ;pic18f452.h: 435: };
[; ;pic18f452.h: 436: struct {
[; ;pic18f452.h: 437: unsigned :1;
[; ;pic18f452.h: 438: unsigned LC1 :1;
[; ;pic18f452.h: 439: };
[; ;pic18f452.h: 440: struct {
[; ;pic18f452.h: 441: unsigned :2;
[; ;pic18f452.h: 442: unsigned LC2 :1;
[; ;pic18f452.h: 443: };
[; ;pic18f452.h: 444: struct {
[; ;pic18f452.h: 445: unsigned :3;
[; ;pic18f452.h: 446: unsigned LC3 :1;
[; ;pic18f452.h: 447: };
[; ;pic18f452.h: 448: struct {
[; ;pic18f452.h: 449: unsigned :4;
[; ;pic18f452.h: 450: unsigned LC4 :1;
[; ;pic18f452.h: 451: };
[; ;pic18f452.h: 452: struct {
[; ;pic18f452.h: 453: unsigned :5;
[; ;pic18f452.h: 454: unsigned LC5 :1;
[; ;pic18f452.h: 455: };
[; ;pic18f452.h: 456: struct {
[; ;pic18f452.h: 457: unsigned :6;
[; ;pic18f452.h: 458: unsigned LC6 :1;
[; ;pic18f452.h: 459: };
[; ;pic18f452.h: 460: struct {
[; ;pic18f452.h: 461: unsigned :7;
[; ;pic18f452.h: 462: unsigned LC7 :1;
[; ;pic18f452.h: 463: };
[; ;pic18f452.h: 464: } LATCbits @ 0xF8B;
[; ;pic18f452.h: 467: extern volatile unsigned char LATD @ 0xF8C;
"469
[; ;pic18f452.h: 469: asm("LATD equ 0F8Ch");
[; <" LATD equ 0F8Ch ;# ">
[; ;pic18f452.h: 472: extern volatile union {
[; ;pic18f452.h: 473: struct {
[; ;pic18f452.h: 474: unsigned LATD0 :1;
[; ;pic18f452.h: 475: unsigned LATD1 :1;
[; ;pic18f452.h: 476: unsigned LATD2 :1;
[; ;pic18f452.h: 477: unsigned LATD3 :1;
[; ;pic18f452.h: 478: unsigned LATD4 :1;
[; ;pic18f452.h: 479: unsigned LATD5 :1;
[; ;pic18f452.h: 480: unsigned LATD6 :1;
[; ;pic18f452.h: 481: unsigned LATD7 :1;
[; ;pic18f452.h: 482: };
[; ;pic18f452.h: 483: struct {
[; ;pic18f452.h: 484: unsigned LATD :8;
[; ;pic18f452.h: 485: };
[; ;pic18f452.h: 486: struct {
[; ;pic18f452.h: 487: unsigned LD0 :1;
[; ;pic18f452.h: 488: };
[; ;pic18f452.h: 489: struct {
[; ;pic18f452.h: 490: unsigned :1;
[; ;pic18f452.h: 491: unsigned LD1 :1;
[; ;pic18f452.h: 492: };
[; ;pic18f452.h: 493: struct {
[; ;pic18f452.h: 494: unsigned :2;
[; ;pic18f452.h: 495: unsigned LD2 :1;
[; ;pic18f452.h: 496: };
[; ;pic18f452.h: 497: struct {
[; ;pic18f452.h: 498: unsigned :3;
[; ;pic18f452.h: 499: unsigned LD3 :1;
[; ;pic18f452.h: 500: };
[; ;pic18f452.h: 501: struct {
[; ;pic18f452.h: 502: unsigned :4;
[; ;pic18f452.h: 503: unsigned LD4 :1;
[; ;pic18f452.h: 504: };
[; ;pic18f452.h: 505: struct {
[; ;pic18f452.h: 506: unsigned :5;
[; ;pic18f452.h: 507: unsigned LD5 :1;
[; ;pic18f452.h: 508: };
[; ;pic18f452.h: 509: struct {
[; ;pic18f452.h: 510: unsigned :6;
[; ;pic18f452.h: 511: unsigned LD6 :1;
[; ;pic18f452.h: 512: };
[; ;pic18f452.h: 513: struct {
[; ;pic18f452.h: 514: unsigned :7;
[; ;pic18f452.h: 515: unsigned LD7 :1;
[; ;pic18f452.h: 516: };
[; ;pic18f452.h: 517: } LATDbits @ 0xF8C;
[; ;pic18f452.h: 520: extern volatile unsigned char LATE @ 0xF8D;
"522
[; ;pic18f452.h: 522: asm("LATE equ 0F8Dh");
[; <" LATE equ 0F8Dh ;# ">
[; ;pic18f452.h: 525: extern volatile union {
[; ;pic18f452.h: 526: struct {
[; ;pic18f452.h: 527: unsigned LATE0 :1;
[; ;pic18f452.h: 528: unsigned LATE1 :1;
[; ;pic18f452.h: 529: unsigned LATE2 :1;
[; ;pic18f452.h: 530: };
[; ;pic18f452.h: 531: struct {
[; ;pic18f452.h: 532: unsigned LATE :8;
[; ;pic18f452.h: 533: };
[; ;pic18f452.h: 534: struct {
[; ;pic18f452.h: 535: unsigned LE0 :1;
[; ;pic18f452.h: 536: };
[; ;pic18f452.h: 537: struct {
[; ;pic18f452.h: 538: unsigned :1;
[; ;pic18f452.h: 539: unsigned LE1 :1;
[; ;pic18f452.h: 540: };
[; ;pic18f452.h: 541: struct {
[; ;pic18f452.h: 542: unsigned :2;
[; ;pic18f452.h: 543: unsigned LE2 :1;
[; ;pic18f452.h: 544: };
[; ;pic18f452.h: 545: struct {
[; ;pic18f452.h: 546: unsigned :3;
[; ;pic18f452.h: 547: unsigned LE3 :1;
[; ;pic18f452.h: 548: };
[; ;pic18f452.h: 549: struct {
[; ;pic18f452.h: 550: unsigned :4;
[; ;pic18f452.h: 551: unsigned LE4 :1;
[; ;pic18f452.h: 552: };
[; ;pic18f452.h: 553: struct {
[; ;pic18f452.h: 554: unsigned :5;
[; ;pic18f452.h: 555: unsigned LE5 :1;
[; ;pic18f452.h: 556: };
[; ;pic18f452.h: 557: struct {
[; ;pic18f452.h: 558: unsigned :6;
[; ;pic18f452.h: 559: unsigned LE6 :1;
[; ;pic18f452.h: 560: };
[; ;pic18f452.h: 561: struct {
[; ;pic18f452.h: 562: unsigned :7;
[; ;pic18f452.h: 563: unsigned LE7 :1;
[; ;pic18f452.h: 564: };
[; ;pic18f452.h: 565: } LATEbits @ 0xF8D;
[; ;pic18f452.h: 568: extern volatile unsigned char TRISA @ 0xF92;
"570
[; ;pic18f452.h: 570: asm("TRISA equ 0F92h");
[; <" TRISA equ 0F92h ;# ">
[; ;pic18f452.h: 573: extern volatile unsigned char DDRA @ 0xF92;
"575
[; ;pic18f452.h: 575: asm("DDRA equ 0F92h");
[; <" DDRA equ 0F92h ;# ">
[; ;pic18f452.h: 578: extern volatile union {
[; ;pic18f452.h: 579: struct {
[; ;pic18f452.h: 580: unsigned TRISA0 :1;
[; ;pic18f452.h: 581: unsigned TRISA1 :1;
[; ;pic18f452.h: 582: unsigned TRISA2 :1;
[; ;pic18f452.h: 583: unsigned TRISA3 :1;
[; ;pic18f452.h: 584: unsigned TRISA4 :1;
[; ;pic18f452.h: 585: unsigned TRISA5 :1;
[; ;pic18f452.h: 586: unsigned TRISA6 :1;
[; ;pic18f452.h: 587: };
[; ;pic18f452.h: 588: struct {
[; ;pic18f452.h: 589: unsigned TRISA :8;
[; ;pic18f452.h: 590: };
[; ;pic18f452.h: 591: struct {
[; ;pic18f452.h: 592: unsigned RA0 :1;
[; ;pic18f452.h: 593: unsigned RA1 :1;
[; ;pic18f452.h: 594: unsigned RA2 :1;
[; ;pic18f452.h: 595: unsigned RA3 :1;
[; ;pic18f452.h: 596: unsigned RA4 :1;
[; ;pic18f452.h: 597: unsigned RA5 :1;
[; ;pic18f452.h: 598: unsigned RA6 :1;
[; ;pic18f452.h: 599: };
[; ;pic18f452.h: 600: } TRISAbits @ 0xF92;
[; ;pic18f452.h: 602: extern volatile union {
[; ;pic18f452.h: 603: struct {
[; ;pic18f452.h: 604: unsigned TRISA0 :1;
[; ;pic18f452.h: 605: unsigned TRISA1 :1;
[; ;pic18f452.h: 606: unsigned TRISA2 :1;
[; ;pic18f452.h: 607: unsigned TRISA3 :1;
[; ;pic18f452.h: 608: unsigned TRISA4 :1;
[; ;pic18f452.h: 609: unsigned TRISA5 :1;
[; ;pic18f452.h: 610: unsigned TRISA6 :1;
[; ;pic18f452.h: 611: };
[; ;pic18f452.h: 612: struct {
[; ;pic18f452.h: 613: unsigned TRISA :8;
[; ;pic18f452.h: 614: };
[; ;pic18f452.h: 615: struct {
[; ;pic18f452.h: 616: unsigned RA0 :1;
[; ;pic18f452.h: 617: unsigned RA1 :1;
[; ;pic18f452.h: 618: unsigned RA2 :1;
[; ;pic18f452.h: 619: unsigned RA3 :1;
[; ;pic18f452.h: 620: unsigned RA4 :1;
[; ;pic18f452.h: 621: unsigned RA5 :1;
[; ;pic18f452.h: 622: unsigned RA6 :1;
[; ;pic18f452.h: 623: };
[; ;pic18f452.h: 624: } DDRAbits @ 0xF92;
[; ;pic18f452.h: 627: extern volatile unsigned char TRISB @ 0xF93;
"629
[; ;pic18f452.h: 629: asm("TRISB equ 0F93h");
[; <" TRISB equ 0F93h ;# ">
[; ;pic18f452.h: 632: extern volatile unsigned char DDRB @ 0xF93;
"634
[; ;pic18f452.h: 634: asm("DDRB equ 0F93h");
[; <" DDRB equ 0F93h ;# ">
[; ;pic18f452.h: 637: extern volatile union {
[; ;pic18f452.h: 638: struct {
[; ;pic18f452.h: 639: unsigned TRISB0 :1;
[; ;pic18f452.h: 640: unsigned TRISB1 :1;
[; ;pic18f452.h: 641: unsigned TRISB2 :1;
[; ;pic18f452.h: 642: unsigned TRISB3 :1;
[; ;pic18f452.h: 643: unsigned TRISB4 :1;
[; ;pic18f452.h: 644: unsigned TRISB5 :1;
[; ;pic18f452.h: 645: unsigned TRISB6 :1;
[; ;pic18f452.h: 646: unsigned TRISB7 :1;
[; ;pic18f452.h: 647: };
[; ;pic18f452.h: 648: struct {
[; ;pic18f452.h: 649: unsigned TRISB :8;
[; ;pic18f452.h: 650: };
[; ;pic18f452.h: 651: struct {
[; ;pic18f452.h: 652: unsigned RB0 :1;
[; ;pic18f452.h: 653: unsigned RB1 :1;
[; ;pic18f452.h: 654: unsigned RB2 :1;
[; ;pic18f452.h: 655: unsigned RB3 :1;
[; ;pic18f452.h: 656: unsigned RB4 :1;
[; ;pic18f452.h: 657: unsigned RB5 :1;
[; ;pic18f452.h: 658: unsigned RB6 :1;
[; ;pic18f452.h: 659: unsigned RB7 :1;
[; ;pic18f452.h: 660: };
[; ;pic18f452.h: 661: struct {
[; ;pic18f452.h: 662: unsigned :3;
[; ;pic18f452.h: 663: unsigned CCP2 :1;
[; ;pic18f452.h: 664: };
[; ;pic18f452.h: 665: } TRISBbits @ 0xF93;
[; ;pic18f452.h: 667: extern volatile union {
[; ;pic18f452.h: 668: struct {
[; ;pic18f452.h: 669: unsigned TRISB0 :1;
[; ;pic18f452.h: 670: unsigned TRISB1 :1;
[; ;pic18f452.h: 671: unsigned TRISB2 :1;
[; ;pic18f452.h: 672: unsigned TRISB3 :1;
[; ;pic18f452.h: 673: unsigned TRISB4 :1;
[; ;pic18f452.h: 674: unsigned TRISB5 :1;
[; ;pic18f452.h: 675: unsigned TRISB6 :1;
[; ;pic18f452.h: 676: unsigned TRISB7 :1;
[; ;pic18f452.h: 677: };
[; ;pic18f452.h: 678: struct {
[; ;pic18f452.h: 679: unsigned TRISB :8;
[; ;pic18f452.h: 680: };
[; ;pic18f452.h: 681: struct {
[; ;pic18f452.h: 682: unsigned RB0 :1;
[; ;pic18f452.h: 683: unsigned RB1 :1;
[; ;pic18f452.h: 684: unsigned RB2 :1;
[; ;pic18f452.h: 685: unsigned RB3 :1;
[; ;pic18f452.h: 686: unsigned RB4 :1;
[; ;pic18f452.h: 687: unsigned RB5 :1;
[; ;pic18f452.h: 688: unsigned RB6 :1;
[; ;pic18f452.h: 689: unsigned RB7 :1;
[; ;pic18f452.h: 690: };
[; ;pic18f452.h: 691: struct {
[; ;pic18f452.h: 692: unsigned :3;
[; ;pic18f452.h: 693: unsigned CCP2 :1;
[; ;pic18f452.h: 694: };
[; ;pic18f452.h: 695: } DDRBbits @ 0xF93;
[; ;pic18f452.h: 698: extern volatile unsigned char TRISC @ 0xF94;
"700
[; ;pic18f452.h: 700: asm("TRISC equ 0F94h");
[; <" TRISC equ 0F94h ;# ">
[; ;pic18f452.h: 703: extern volatile unsigned char DDRC @ 0xF94;
"705
[; ;pic18f452.h: 705: asm("DDRC equ 0F94h");
[; <" DDRC equ 0F94h ;# ">
[; ;pic18f452.h: 708: extern volatile union {
[; ;pic18f452.h: 709: struct {
[; ;pic18f452.h: 710: unsigned TRISC0 :1;
[; ;pic18f452.h: 711: unsigned TRISC1 :1;
[; ;pic18f452.h: 712: unsigned TRISC2 :1;
[; ;pic18f452.h: 713: unsigned TRISC3 :1;
[; ;pic18f452.h: 714: unsigned TRISC4 :1;
[; ;pic18f452.h: 715: unsigned TRISC5 :1;
[; ;pic18f452.h: 716: unsigned TRISC6 :1;
[; ;pic18f452.h: 717: unsigned TRISC7 :1;
[; ;pic18f452.h: 718: };
[; ;pic18f452.h: 719: struct {
[; ;pic18f452.h: 720: unsigned TRISC :8;
[; ;pic18f452.h: 721: };
[; ;pic18f452.h: 722: struct {
[; ;pic18f452.h: 723: unsigned RC0 :1;
[; ;pic18f452.h: 724: unsigned RC1 :1;
[; ;pic18f452.h: 725: unsigned RC2 :1;
[; ;pic18f452.h: 726: unsigned RC3 :1;
[; ;pic18f452.h: 727: unsigned RC4 :1;
[; ;pic18f452.h: 728: unsigned RC5 :1;
[; ;pic18f452.h: 729: unsigned RC6 :1;
[; ;pic18f452.h: 730: unsigned RC7 :1;
[; ;pic18f452.h: 731: };
[; ;pic18f452.h: 732: struct {
[; ;pic18f452.h: 733: unsigned :1;
[; ;pic18f452.h: 734: unsigned CCP2 :1;
[; ;pic18f452.h: 735: };
[; ;pic18f452.h: 736: } TRISCbits @ 0xF94;
[; ;pic18f452.h: 738: extern volatile union {
[; ;pic18f452.h: 739: struct {
[; ;pic18f452.h: 740: unsigned TRISC0 :1;
[; ;pic18f452.h: 741: unsigned TRISC1 :1;
[; ;pic18f452.h: 742: unsigned TRISC2 :1;
[; ;pic18f452.h: 743: unsigned TRISC3 :1;
[; ;pic18f452.h: 744: unsigned TRISC4 :1;
[; ;pic18f452.h: 745: unsigned TRISC5 :1;
[; ;pic18f452.h: 746: unsigned TRISC6 :1;
[; ;pic18f452.h: 747: unsigned TRISC7 :1;
[; ;pic18f452.h: 748: };
[; ;pic18f452.h: 749: struct {
[; ;pic18f452.h: 750: unsigned TRISC :8;
[; ;pic18f452.h: 751: };
[; ;pic18f452.h: 752: struct {
[; ;pic18f452.h: 753: unsigned RC0 :1;
[; ;pic18f452.h: 754: unsigned RC1 :1;
[; ;pic18f452.h: 755: unsigned RC2 :1;
[; ;pic18f452.h: 756: unsigned RC3 :1;
[; ;pic18f452.h: 757: unsigned RC4 :1;
[; ;pic18f452.h: 758: unsigned RC5 :1;
[; ;pic18f452.h: 759: unsigned RC6 :1;
[; ;pic18f452.h: 760: unsigned RC7 :1;
[; ;pic18f452.h: 761: };
[; ;pic18f452.h: 762: struct {
[; ;pic18f452.h: 763: unsigned :1;
[; ;pic18f452.h: 764: unsigned CCP2 :1;
[; ;pic18f452.h: 765: };
[; ;pic18f452.h: 766: } DDRCbits @ 0xF94;
[; ;pic18f452.h: 769: extern volatile unsigned char TRISD @ 0xF95;
"771
[; ;pic18f452.h: 771: asm("TRISD equ 0F95h");
[; <" TRISD equ 0F95h ;# ">
[; ;pic18f452.h: 774: extern volatile unsigned char DDRD @ 0xF95;
"776
[; ;pic18f452.h: 776: asm("DDRD equ 0F95h");
[; <" DDRD equ 0F95h ;# ">
[; ;pic18f452.h: 779: extern volatile union {
[; ;pic18f452.h: 780: struct {
[; ;pic18f452.h: 781: unsigned TRISD0 :1;
[; ;pic18f452.h: 782: unsigned TRISD1 :1;
[; ;pic18f452.h: 783: unsigned TRISD2 :1;
[; ;pic18f452.h: 784: unsigned TRISD3 :1;
[; ;pic18f452.h: 785: unsigned TRISD4 :1;
[; ;pic18f452.h: 786: unsigned TRISD5 :1;
[; ;pic18f452.h: 787: unsigned TRISD6 :1;
[; ;pic18f452.h: 788: unsigned TRISD7 :1;
[; ;pic18f452.h: 789: };
[; ;pic18f452.h: 790: struct {
[; ;pic18f452.h: 791: unsigned TRISD :8;
[; ;pic18f452.h: 792: };
[; ;pic18f452.h: 793: struct {
[; ;pic18f452.h: 794: unsigned RD0 :1;
[; ;pic18f452.h: 795: unsigned RD1 :1;
[; ;pic18f452.h: 796: unsigned RD2 :1;
[; ;pic18f452.h: 797: unsigned RD3 :1;
[; ;pic18f452.h: 798: unsigned RD4 :1;
[; ;pic18f452.h: 799: unsigned RD5 :1;
[; ;pic18f452.h: 800: unsigned RD6 :1;
[; ;pic18f452.h: 801: unsigned RD7 :1;
[; ;pic18f452.h: 802: };
[; ;pic18f452.h: 803: } TRISDbits @ 0xF95;
[; ;pic18f452.h: 805: extern volatile union {
[; ;pic18f452.h: 806: struct {
[; ;pic18f452.h: 807: unsigned TRISD0 :1;
[; ;pic18f452.h: 808: unsigned TRISD1 :1;
[; ;pic18f452.h: 809: unsigned TRISD2 :1;
[; ;pic18f452.h: 810: unsigned TRISD3 :1;
[; ;pic18f452.h: 811: unsigned TRISD4 :1;
[; ;pic18f452.h: 812: unsigned TRISD5 :1;
[; ;pic18f452.h: 813: unsigned TRISD6 :1;
[; ;pic18f452.h: 814: unsigned TRISD7 :1;
[; ;pic18f452.h: 815: };
[; ;pic18f452.h: 816: struct {
[; ;pic18f452.h: 817: unsigned TRISD :8;
[; ;pic18f452.h: 818: };
[; ;pic18f452.h: 819: struct {
[; ;pic18f452.h: 820: unsigned RD0 :1;
[; ;pic18f452.h: 821: unsigned RD1 :1;
[; ;pic18f452.h: 822: unsigned RD2 :1;
[; ;pic18f452.h: 823: unsigned RD3 :1;
[; ;pic18f452.h: 824: unsigned RD4 :1;
[; ;pic18f452.h: 825: unsigned RD5 :1;
[; ;pic18f452.h: 826: unsigned RD6 :1;
[; ;pic18f452.h: 827: unsigned RD7 :1;
[; ;pic18f452.h: 828: };
[; ;pic18f452.h: 829: } DDRDbits @ 0xF95;
[; ;pic18f452.h: 832: extern volatile unsigned char TRISE @ 0xF96;
"834
[; ;pic18f452.h: 834: asm("TRISE equ 0F96h");
[; <" TRISE equ 0F96h ;# ">
[; ;pic18f452.h: 837: extern volatile unsigned char DDRE @ 0xF96;
"839
[; ;pic18f452.h: 839: asm("DDRE equ 0F96h");
[; <" DDRE equ 0F96h ;# ">
[; ;pic18f452.h: 842: extern volatile union {
[; ;pic18f452.h: 843: struct {
[; ;pic18f452.h: 844: unsigned TRISE0 :1;
[; ;pic18f452.h: 845: unsigned TRISE1 :1;
[; ;pic18f452.h: 846: unsigned TRISE2 :1;
[; ;pic18f452.h: 847: unsigned :1;
[; ;pic18f452.h: 848: unsigned PSPMODE :1;
[; ;pic18f452.h: 849: unsigned IBOV :1;
[; ;pic18f452.h: 850: unsigned OBF :1;
[; ;pic18f452.h: 851: unsigned IBF :1;
[; ;pic18f452.h: 852: };
[; ;pic18f452.h: 853: struct {
[; ;pic18f452.h: 854: unsigned TRISE :8;
[; ;pic18f452.h: 855: };
[; ;pic18f452.h: 856: struct {
[; ;pic18f452.h: 857: unsigned RE0 :1;
[; ;pic18f452.h: 858: unsigned RE1 :1;
[; ;pic18f452.h: 859: unsigned RE2 :1;
[; ;pic18f452.h: 860: };
[; ;pic18f452.h: 861: } TRISEbits @ 0xF96;
[; ;pic18f452.h: 863: extern volatile union {
[; ;pic18f452.h: 864: struct {
[; ;pic18f452.h: 865: unsigned TRISE0 :1;
[; ;pic18f452.h: 866: unsigned TRISE1 :1;
[; ;pic18f452.h: 867: unsigned TRISE2 :1;
[; ;pic18f452.h: 868: unsigned :1;
[; ;pic18f452.h: 869: unsigned PSPMODE :1;
[; ;pic18f452.h: 870: unsigned IBOV :1;
[; ;pic18f452.h: 871: unsigned OBF :1;
[; ;pic18f452.h: 872: unsigned IBF :1;
[; ;pic18f452.h: 873: };
[; ;pic18f452.h: 874: struct {
[; ;pic18f452.h: 875: unsigned TRISE :8;
[; ;pic18f452.h: 876: };
[; ;pic18f452.h: 877: struct {
[; ;pic18f452.h: 878: unsigned RE0 :1;
[; ;pic18f452.h: 879: unsigned RE1 :1;
[; ;pic18f452.h: 880: unsigned RE2 :1;
[; ;pic18f452.h: 881: };
[; ;pic18f452.h: 882: } DDREbits @ 0xF96;
[; ;pic18f452.h: 885: extern volatile unsigned char PIE1 @ 0xF9D;
"887
[; ;pic18f452.h: 887: asm("PIE1 equ 0F9Dh");
[; <" PIE1 equ 0F9Dh ;# ">
[; ;pic18f452.h: 890: extern volatile union {
[; ;pic18f452.h: 891: struct {
[; ;pic18f452.h: 892: unsigned TMR1IE :1;
[; ;pic18f452.h: 893: unsigned TMR2IE :1;
[; ;pic18f452.h: 894: unsigned CCP1IE :1;
[; ;pic18f452.h: 895: unsigned SSPIE :1;
[; ;pic18f452.h: 896: unsigned TXIE :1;
[; ;pic18f452.h: 897: unsigned RCIE :1;
[; ;pic18f452.h: 898: unsigned ADIE :1;
[; ;pic18f452.h: 899: unsigned PSPIE :1;
[; ;pic18f452.h: 900: };
[; ;pic18f452.h: 901: struct {
[; ;pic18f452.h: 902: unsigned :5;
[; ;pic18f452.h: 903: unsigned RC1IE :1;
[; ;pic18f452.h: 904: };
[; ;pic18f452.h: 905: struct {
[; ;pic18f452.h: 906: unsigned :4;
[; ;pic18f452.h: 907: unsigned TX1IE :1;
[; ;pic18f452.h: 908: };
[; ;pic18f452.h: 909: } PIE1bits @ 0xF9D;
[; ;pic18f452.h: 912: extern volatile unsigned char PIR1 @ 0xF9E;
"914
[; ;pic18f452.h: 914: asm("PIR1 equ 0F9Eh");
[; <" PIR1 equ 0F9Eh ;# ">
[; ;pic18f452.h: 917: extern volatile union {
[; ;pic18f452.h: 918: struct {
[; ;pic18f452.h: 919: unsigned TMR1IF :1;
[; ;pic18f452.h: 920: unsigned TMR2IF :1;
[; ;pic18f452.h: 921: unsigned CCP1IF :1;
[; ;pic18f452.h: 922: unsigned SSPIF :1;
[; ;pic18f452.h: 923: unsigned TXIF :1;
[; ;pic18f452.h: 924: unsigned RCIF :1;
[; ;pic18f452.h: 925: unsigned ADIF :1;
[; ;pic18f452.h: 926: unsigned PSPIF :1;
[; ;pic18f452.h: 927: };
[; ;pic18f452.h: 928: struct {
[; ;pic18f452.h: 929: unsigned TMR1IF :1;
[; ;pic18f452.h: 930: unsigned TMR2IF :1;
[; ;pic18f452.h: 931: unsigned CCP1IF :1;
[; ;pic18f452.h: 932: unsigned SSPIF :1;
[; ;pic18f452.h: 933: unsigned :2;
[; ;pic18f452.h: 934: unsigned ADIF :1;
[; ;pic18f452.h: 935: unsigned PSPIF :1;
[; ;pic18f452.h: 936: };
[; ;pic18f452.h: 937: struct {
[; ;pic18f452.h: 938: unsigned :5;
[; ;pic18f452.h: 939: unsigned RC1IF :1;
[; ;pic18f452.h: 940: };
[; ;pic18f452.h: 941: struct {
[; ;pic18f452.h: 942: unsigned :4;
[; ;pic18f452.h: 943: unsigned TX1IF :1;
[; ;pic18f452.h: 944: };
[; ;pic18f452.h: 945: } PIR1bits @ 0xF9E;
[; ;pic18f452.h: 948: extern volatile unsigned char IPR1 @ 0xF9F;
"950
[; ;pic18f452.h: 950: asm("IPR1 equ 0F9Fh");
[; <" IPR1 equ 0F9Fh ;# ">
[; ;pic18f452.h: 953: extern volatile union {
[; ;pic18f452.h: 954: struct {
[; ;pic18f452.h: 955: unsigned TMR1IP :1;
[; ;pic18f452.h: 956: unsigned TMR2IP :1;
[; ;pic18f452.h: 957: unsigned CCP1IP :1;
[; ;pic18f452.h: 958: unsigned SSPIP :1;
[; ;pic18f452.h: 959: unsigned TXIP :1;
[; ;pic18f452.h: 960: unsigned RCIP :1;
[; ;pic18f452.h: 961: unsigned ADIP :1;
[; ;pic18f452.h: 962: unsigned PSPIP :1;
[; ;pic18f452.h: 963: };
[; ;pic18f452.h: 964: struct {
[; ;pic18f452.h: 965: unsigned :5;
[; ;pic18f452.h: 966: unsigned RC1IP :1;
[; ;pic18f452.h: 967: };
[; ;pic18f452.h: 968: struct {
[; ;pic18f452.h: 969: unsigned :4;
[; ;pic18f452.h: 970: unsigned TX1IP :1;
[; ;pic18f452.h: 971: };
[; ;pic18f452.h: 972: } IPR1bits @ 0xF9F;
[; ;pic18f452.h: 975: extern volatile unsigned char PIE2 @ 0xFA0;
"977
[; ;pic18f452.h: 977: asm("PIE2 equ 0FA0h");
[; <" PIE2 equ 0FA0h ;# ">
[; ;pic18f452.h: 980: extern volatile union {
[; ;pic18f452.h: 981: struct {
[; ;pic18f452.h: 982: unsigned CCP2IE :1;
[; ;pic18f452.h: 983: unsigned TMR3IE :1;
[; ;pic18f452.h: 984: unsigned LVDIE :1;
[; ;pic18f452.h: 985: unsigned BCLIE :1;
[; ;pic18f452.h: 986: unsigned EEIE :1;
[; ;pic18f452.h: 987: };
[; ;pic18f452.h: 988: } PIE2bits @ 0xFA0;
[; ;pic18f452.h: 991: extern volatile unsigned char PIR2 @ 0xFA1;
"993
[; ;pic18f452.h: 993: asm("PIR2 equ 0FA1h");
[; <" PIR2 equ 0FA1h ;# ">
[; ;pic18f452.h: 996: extern volatile union {
[; ;pic18f452.h: 997: struct {
[; ;pic18f452.h: 998: unsigned CCP2IF :1;
[; ;pic18f452.h: 999: unsigned TMR3IF :1;
[; ;pic18f452.h: 1000: unsigned LVDIF :1;
[; ;pic18f452.h: 1001: unsigned BCLIF :1;
[; ;pic18f452.h: 1002: unsigned EEIF :1;
[; ;pic18f452.h: 1003: };
[; ;pic18f452.h: 1004: } PIR2bits @ 0xFA1;
[; ;pic18f452.h: 1007: extern volatile unsigned char IPR2 @ 0xFA2;
"1009
[; ;pic18f452.h: 1009: asm("IPR2 equ 0FA2h");
[; <" IPR2 equ 0FA2h ;# ">
[; ;pic18f452.h: 1012: extern volatile union {
[; ;pic18f452.h: 1013: struct {
[; ;pic18f452.h: 1014: unsigned CCP2IP :1;
[; ;pic18f452.h: 1015: unsigned TMR3IP :1;
[; ;pic18f452.h: 1016: unsigned LVDIP :1;
[; ;pic18f452.h: 1017: unsigned BCLIP :1;
[; ;pic18f452.h: 1018: unsigned EEIP :1;
[; ;pic18f452.h: 1019: };
[; ;pic18f452.h: 1020: } IPR2bits @ 0xFA2;
[; ;pic18f452.h: 1023: extern volatile unsigned char EECON1 @ 0xFA6;
"1025
[; ;pic18f452.h: 1025: asm("EECON1 equ 0FA6h");
[; <" EECON1 equ 0FA6h ;# ">
[; ;pic18f452.h: 1028: extern volatile union {
[; ;pic18f452.h: 1029: struct {
[; ;pic18f452.h: 1030: unsigned RD :1;
[; ;pic18f452.h: 1031: unsigned WR :1;
[; ;pic18f452.h: 1032: unsigned WREN :1;
[; ;pic18f452.h: 1033: unsigned WRERR :1;
[; ;pic18f452.h: 1034: unsigned FREE :1;
[; ;pic18f452.h: 1035: unsigned :1;
[; ;pic18f452.h: 1036: unsigned CFGS :1;
[; ;pic18f452.h: 1037: unsigned EEPGD :1;
[; ;pic18f452.h: 1038: };
[; ;pic18f452.h: 1039: struct {
[; ;pic18f452.h: 1040: unsigned :6;
[; ;pic18f452.h: 1041: unsigned EEFS :1;
[; ;pic18f452.h: 1042: };
[; ;pic18f452.h: 1043: } EECON1bits @ 0xFA6;
[; ;pic18f452.h: 1046: extern volatile unsigned char EECON2 @ 0xFA7;
"1048
[; ;pic18f452.h: 1048: asm("EECON2 equ 0FA7h");
[; <" EECON2 equ 0FA7h ;# ">
[; ;pic18f452.h: 1051: extern volatile union {
[; ;pic18f452.h: 1052: struct {
[; ;pic18f452.h: 1053: unsigned EECON2 :8;
[; ;pic18f452.h: 1054: };
[; ;pic18f452.h: 1055: } EECON2bits @ 0xFA7;
[; ;pic18f452.h: 1058: extern volatile unsigned char EEDATA @ 0xFA8;
"1060
[; ;pic18f452.h: 1060: asm("EEDATA equ 0FA8h");
[; <" EEDATA equ 0FA8h ;# ">
[; ;pic18f452.h: 1063: extern volatile union {
[; ;pic18f452.h: 1064: struct {
[; ;pic18f452.h: 1065: unsigned EEDATA :8;
[; ;pic18f452.h: 1066: };
[; ;pic18f452.h: 1067: } EEDATAbits @ 0xFA8;
[; ;pic18f452.h: 1070: extern volatile unsigned char EEADR @ 0xFA9;
"1072
[; ;pic18f452.h: 1072: asm("EEADR equ 0FA9h");
[; <" EEADR equ 0FA9h ;# ">
[; ;pic18f452.h: 1075: extern volatile union {
[; ;pic18f452.h: 1076: struct {
[; ;pic18f452.h: 1077: unsigned EEADR :8;
[; ;pic18f452.h: 1078: };
[; ;pic18f452.h: 1079: } EEADRbits @ 0xFA9;
[; ;pic18f452.h: 1082: extern volatile unsigned char RCSTA @ 0xFAB;
"1084
[; ;pic18f452.h: 1084: asm("RCSTA equ 0FABh");
[; <" RCSTA equ 0FABh ;# ">
[; ;pic18f452.h: 1087: extern volatile unsigned char RCSTA1 @ 0xFAB;
"1089
[; ;pic18f452.h: 1089: asm("RCSTA1 equ 0FABh");
[; <" RCSTA1 equ 0FABh ;# ">
[; ;pic18f452.h: 1092: extern volatile union {
[; ;pic18f452.h: 1093: struct {
[; ;pic18f452.h: 1094: unsigned RX9D :1;
[; ;pic18f452.h: 1095: unsigned OERR :1;
[; ;pic18f452.h: 1096: unsigned FERR :1;
[; ;pic18f452.h: 1097: unsigned ADDEN :1;
[; ;pic18f452.h: 1098: unsigned CREN :1;
[; ;pic18f452.h: 1099: unsigned SREN :1;
[; ;pic18f452.h: 1100: unsigned RX9 :1;
[; ;pic18f452.h: 1101: unsigned SPEN :1;
[; ;pic18f452.h: 1102: };
[; ;pic18f452.h: 1103: struct {
[; ;pic18f452.h: 1104: unsigned RCD8 :1;
[; ;pic18f452.h: 1105: unsigned :5;
[; ;pic18f452.h: 1106: unsigned RC8_9 :1;
[; ;pic18f452.h: 1107: };
[; ;pic18f452.h: 1108: struct {
[; ;pic18f452.h: 1109: unsigned :6;
[; ;pic18f452.h: 1110: unsigned NOT_RC8 :1;
[; ;pic18f452.h: 1111: };
[; ;pic18f452.h: 1112: struct {
[; ;pic18f452.h: 1113: unsigned :6;
[; ;pic18f452.h: 1114: unsigned nRC8 :1;
[; ;pic18f452.h: 1115: };
[; ;pic18f452.h: 1116: struct {
[; ;pic18f452.h: 1117: unsigned :6;
[; ;pic18f452.h: 1118: unsigned RC9 :1;
[; ;pic18f452.h: 1119: };
[; ;pic18f452.h: 1120: struct {
[; ;pic18f452.h: 1121: unsigned :5;
[; ;pic18f452.h: 1122: unsigned SRENA :1;
[; ;pic18f452.h: 1123: };
[; ;pic18f452.h: 1124: } RCSTAbits @ 0xFAB;
[; ;pic18f452.h: 1126: extern volatile union {
[; ;pic18f452.h: 1127: struct {
[; ;pic18f452.h: 1128: unsigned RX9D :1;
[; ;pic18f452.h: 1129: unsigned OERR :1;
[; ;pic18f452.h: 1130: unsigned FERR :1;
[; ;pic18f452.h: 1131: unsigned ADDEN :1;
[; ;pic18f452.h: 1132: unsigned CREN :1;
[; ;pic18f452.h: 1133: unsigned SREN :1;
[; ;pic18f452.h: 1134: unsigned RX9 :1;
[; ;pic18f452.h: 1135: unsigned SPEN :1;
[; ;pic18f452.h: 1136: };
[; ;pic18f452.h: 1137: struct {
[; ;pic18f452.h: 1138: unsigned RCD8 :1;
[; ;pic18f452.h: 1139: unsigned :5;
[; ;pic18f452.h: 1140: unsigned RC8_9 :1;
[; ;pic18f452.h: 1141: };
[; ;pic18f452.h: 1142: struct {
[; ;pic18f452.h: 1143: unsigned :6;
[; ;pic18f452.h: 1144: unsigned NOT_RC8 :1;
[; ;pic18f452.h: 1145: };
[; ;pic18f452.h: 1146: struct {
[; ;pic18f452.h: 1147: unsigned :6;
[; ;pic18f452.h: 1148: unsigned nRC8 :1;
[; ;pic18f452.h: 1149: };
[; ;pic18f452.h: 1150: struct {
[; ;pic18f452.h: 1151: unsigned :6;
[; ;pic18f452.h: 1152: unsigned RC9 :1;
[; ;pic18f452.h: 1153: };
[; ;pic18f452.h: 1154: struct {
[; ;pic18f452.h: 1155: unsigned :5;
[; ;pic18f452.h: 1156: unsigned SRENA :1;
[; ;pic18f452.h: 1157: };
[; ;pic18f452.h: 1158: } RCSTA1bits @ 0xFAB;
[; ;pic18f452.h: 1161: extern volatile unsigned char TXSTA @ 0xFAC;
"1163
[; ;pic18f452.h: 1163: asm("TXSTA equ 0FACh");
[; <" TXSTA equ 0FACh ;# ">
[; ;pic18f452.h: 1166: extern volatile unsigned char TXSTA1 @ 0xFAC;
"1168
[; ;pic18f452.h: 1168: asm("TXSTA1 equ 0FACh");
[; <" TXSTA1 equ 0FACh ;# ">
[; ;pic18f452.h: 1171: extern volatile union {
[; ;pic18f452.h: 1172: struct {
[; ;pic18f452.h: 1173: unsigned TX9D :1;
[; ;pic18f452.h: 1174: unsigned TRMT :1;
[; ;pic18f452.h: 1175: unsigned BRGH :1;
[; ;pic18f452.h: 1176: unsigned :1;
[; ;pic18f452.h: 1177: unsigned SYNC :1;
[; ;pic18f452.h: 1178: unsigned TXEN :1;
[; ;pic18f452.h: 1179: unsigned TX9 :1;
[; ;pic18f452.h: 1180: unsigned CSRC :1;
[; ;pic18f452.h: 1181: };
[; ;pic18f452.h: 1182: struct {
[; ;pic18f452.h: 1183: unsigned TXD8 :1;
[; ;pic18f452.h: 1184: unsigned :5;
[; ;pic18f452.h: 1185: unsigned TX8_9 :1;
[; ;pic18f452.h: 1186: };
[; ;pic18f452.h: 1187: struct {
[; ;pic18f452.h: 1188: unsigned :6;
[; ;pic18f452.h: 1189: unsigned NOT_TX8 :1;
[; ;pic18f452.h: 1190: };
[; ;pic18f452.h: 1191: struct {
[; ;pic18f452.h: 1192: unsigned :6;
[; ;pic18f452.h: 1193: unsigned nTX8 :1;
[; ;pic18f452.h: 1194: };
[; ;pic18f452.h: 1195: struct {
[; ;pic18f452.h: 1196: unsigned :2;
[; ;pic18f452.h: 1197: unsigned BRGH1 :1;
[; ;pic18f452.h: 1198: };
[; ;pic18f452.h: 1199: struct {
[; ;pic18f452.h: 1200: unsigned :7;
[; ;pic18f452.h: 1201: unsigned CSRC1 :1;
[; ;pic18f452.h: 1202: };
[; ;pic18f452.h: 1203: struct {
[; ;pic18f452.h: 1204: unsigned :4;
[; ;pic18f452.h: 1205: unsigned SYNC1 :1;
[; ;pic18f452.h: 1206: };
[; ;pic18f452.h: 1207: struct {
[; ;pic18f452.h: 1208: unsigned :1;
[; ;pic18f452.h: 1209: unsigned TRMT1 :1;
[; ;pic18f452.h: 1210: };
[; ;pic18f452.h: 1211: struct {
[; ;pic18f452.h: 1212: unsigned :6;
[; ;pic18f452.h: 1213: unsigned TX91 :1;
[; ;pic18f452.h: 1214: };
[; ;pic18f452.h: 1215: struct {
[; ;pic18f452.h: 1216: unsigned TX9D1 :1;
[; ;pic18f452.h: 1217: };
[; ;pic18f452.h: 1218: struct {
[; ;pic18f452.h: 1219: unsigned :5;
[; ;pic18f452.h: 1220: unsigned TXEN1 :1;
[; ;pic18f452.h: 1221: };
[; ;pic18f452.h: 1222: } TXSTAbits @ 0xFAC;
[; ;pic18f452.h: 1224: extern volatile union {
[; ;pic18f452.h: 1225: struct {
[; ;pic18f452.h: 1226: unsigned TX9D :1;
[; ;pic18f452.h: 1227: unsigned TRMT :1;
[; ;pic18f452.h: 1228: unsigned BRGH :1;
[; ;pic18f452.h: 1229: unsigned :1;
[; ;pic18f452.h: 1230: unsigned SYNC :1;
[; ;pic18f452.h: 1231: unsigned TXEN :1;
[; ;pic18f452.h: 1232: unsigned TX9 :1;
[; ;pic18f452.h: 1233: unsigned CSRC :1;
[; ;pic18f452.h: 1234: };
[; ;pic18f452.h: 1235: struct {
[; ;pic18f452.h: 1236: unsigned TXD8 :1;
[; ;pic18f452.h: 1237: unsigned :5;
[; ;pic18f452.h: 1238: unsigned TX8_9 :1;
[; ;pic18f452.h: 1239: };
[; ;pic18f452.h: 1240: struct {
[; ;pic18f452.h: 1241: unsigned :6;
[; ;pic18f452.h: 1242: unsigned NOT_TX8 :1;
[; ;pic18f452.h: 1243: };
[; ;pic18f452.h: 1244: struct {
[; ;pic18f452.h: 1245: unsigned :6;
[; ;pic18f452.h: 1246: unsigned nTX8 :1;
[; ;pic18f452.h: 1247: };
[; ;pic18f452.h: 1248: struct {
[; ;pic18f452.h: 1249: unsigned :2;
[; ;pic18f452.h: 1250: unsigned BRGH1 :1;
[; ;pic18f452.h: 1251: };
[; ;pic18f452.h: 1252: struct {
[; ;pic18f452.h: 1253: unsigned :7;
[; ;pic18f452.h: 1254: unsigned CSRC1 :1;
[; ;pic18f452.h: 1255: };
[; ;pic18f452.h: 1256: struct {
[; ;pic18f452.h: 1257: unsigned :4;
[; ;pic18f452.h: 1258: unsigned SYNC1 :1;
[; ;pic18f452.h: 1259: };
[; ;pic18f452.h: 1260: struct {
[; ;pic18f452.h: 1261: unsigned :1;
[; ;pic18f452.h: 1262: unsigned TRMT1 :1;
[; ;pic18f452.h: 1263: };
[; ;pic18f452.h: 1264: struct {
[; ;pic18f452.h: 1265: unsigned :6;
[; ;pic18f452.h: 1266: unsigned TX91 :1;
[; ;pic18f452.h: 1267: };
[; ;pic18f452.h: 1268: struct {
[; ;pic18f452.h: 1269: unsigned TX9D1 :1;
[; ;pic18f452.h: 1270: };
[; ;pic18f452.h: 1271: struct {
[; ;pic18f452.h: 1272: unsigned :5;
[; ;pic18f452.h: 1273: unsigned TXEN1 :1;
[; ;pic18f452.h: 1274: };
[; ;pic18f452.h: 1275: } TXSTA1bits @ 0xFAC;
[; ;pic18f452.h: 1278: extern volatile unsigned char TXREG @ 0xFAD;
"1280
[; ;pic18f452.h: 1280: asm("TXREG equ 0FADh");
[; <" TXREG equ 0FADh ;# ">
[; ;pic18f452.h: 1283: extern volatile unsigned char TXREG1 @ 0xFAD;
"1285
[; ;pic18f452.h: 1285: asm("TXREG1 equ 0FADh");
[; <" TXREG1 equ 0FADh ;# ">
[; ;pic18f452.h: 1288: extern volatile union {
[; ;pic18f452.h: 1289: struct {
[; ;pic18f452.h: 1290: unsigned TXREG :8;
[; ;pic18f452.h: 1291: };
[; ;pic18f452.h: 1292: } TXREGbits @ 0xFAD;
[; ;pic18f452.h: 1294: extern volatile union {
[; ;pic18f452.h: 1295: struct {
[; ;pic18f452.h: 1296: unsigned TXREG :8;
[; ;pic18f452.h: 1297: };
[; ;pic18f452.h: 1298: } TXREG1bits @ 0xFAD;
[; ;pic18f452.h: 1301: extern volatile unsigned char RCREG @ 0xFAE;
"1303
[; ;pic18f452.h: 1303: asm("RCREG equ 0FAEh");
[; <" RCREG equ 0FAEh ;# ">
[; ;pic18f452.h: 1306: extern volatile unsigned char RCREG1 @ 0xFAE;
"1308
[; ;pic18f452.h: 1308: asm("RCREG1 equ 0FAEh");
[; <" RCREG1 equ 0FAEh ;# ">
[; ;pic18f452.h: 1311: extern volatile union {
[; ;pic18f452.h: 1312: struct {
[; ;pic18f452.h: 1313: unsigned RCREG :8;
[; ;pic18f452.h: 1314: };
[; ;pic18f452.h: 1315: } RCREGbits @ 0xFAE;
[; ;pic18f452.h: 1317: extern volatile union {
[; ;pic18f452.h: 1318: struct {
[; ;pic18f452.h: 1319: unsigned RCREG :8;
[; ;pic18f452.h: 1320: };
[; ;pic18f452.h: 1321: } RCREG1bits @ 0xFAE;
[; ;pic18f452.h: 1324: extern volatile unsigned char SPBRG @ 0xFAF;
"1326
[; ;pic18f452.h: 1326: asm("SPBRG equ 0FAFh");
[; <" SPBRG equ 0FAFh ;# ">
[; ;pic18f452.h: 1329: extern volatile unsigned char SPBRG1 @ 0xFAF;
"1331
[; ;pic18f452.h: 1331: asm("SPBRG1 equ 0FAFh");
[; <" SPBRG1 equ 0FAFh ;# ">
[; ;pic18f452.h: 1334: extern volatile union {
[; ;pic18f452.h: 1335: struct {
[; ;pic18f452.h: 1336: unsigned SPBRG :8;
[; ;pic18f452.h: 1337: };
[; ;pic18f452.h: 1338: } SPBRGbits @ 0xFAF;
[; ;pic18f452.h: 1340: extern volatile union {
[; ;pic18f452.h: 1341: struct {
[; ;pic18f452.h: 1342: unsigned SPBRG :8;
[; ;pic18f452.h: 1343: };
[; ;pic18f452.h: 1344: } SPBRG1bits @ 0xFAF;
[; ;pic18f452.h: 1347: extern volatile unsigned char T3CON @ 0xFB1;
"1349
[; ;pic18f452.h: 1349: asm("T3CON equ 0FB1h");
[; <" T3CON equ 0FB1h ;# ">
[; ;pic18f452.h: 1352: extern volatile union {
[; ;pic18f452.h: 1353: struct {
[; ;pic18f452.h: 1354: unsigned :2;
[; ;pic18f452.h: 1355: unsigned NOT_T3SYNC :1;
[; ;pic18f452.h: 1356: };
[; ;pic18f452.h: 1357: struct {
[; ;pic18f452.h: 1358: unsigned TMR3ON :1;
[; ;pic18f452.h: 1359: unsigned TMR3CS :1;
[; ;pic18f452.h: 1360: unsigned nT3SYNC :1;
[; ;pic18f452.h: 1361: unsigned T3CCP1 :1;
[; ;pic18f452.h: 1362: unsigned T3CKPS :2;
[; ;pic18f452.h: 1363: unsigned T3CCP2 :1;
[; ;pic18f452.h: 1364: unsigned RD16 :1;
[; ;pic18f452.h: 1365: };
[; ;pic18f452.h: 1366: struct {
[; ;pic18f452.h: 1367: unsigned :2;
[; ;pic18f452.h: 1368: unsigned T3SYNC :1;
[; ;pic18f452.h: 1369: unsigned :1;
[; ;pic18f452.h: 1370: unsigned T3CKPS0 :1;
[; ;pic18f452.h: 1371: unsigned T3CKPS1 :1;
[; ;pic18f452.h: 1372: };
[; ;pic18f452.h: 1373: struct {
[; ;pic18f452.h: 1374: unsigned :2;
[; ;pic18f452.h: 1375: unsigned T3INSYNC :1;
[; ;pic18f452.h: 1376: };
[; ;pic18f452.h: 1377: struct {
[; ;pic18f452.h: 1378: unsigned :7;
[; ;pic18f452.h: 1379: unsigned RD163 :1;
[; ;pic18f452.h: 1380: };
[; ;pic18f452.h: 1381: struct {
[; ;pic18f452.h: 1382: unsigned :3;
[; ;pic18f452.h: 1383: unsigned SOSCEN3 :1;
[; ;pic18f452.h: 1384: };
[; ;pic18f452.h: 1385: struct {
[; ;pic18f452.h: 1386: unsigned :7;
[; ;pic18f452.h: 1387: unsigned T3RD16 :1;
[; ;pic18f452.h: 1388: };
[; ;pic18f452.h: 1389: } T3CONbits @ 0xFB1;
[; ;pic18f452.h: 1392: extern volatile unsigned short TMR3 @ 0xFB2;
"1394
[; ;pic18f452.h: 1394: asm("TMR3 equ 0FB2h");
[; <" TMR3 equ 0FB2h ;# ">
[; ;pic18f452.h: 1397: extern volatile union {
[; ;pic18f452.h: 1398: struct {
[; ;pic18f452.h: 1399: unsigned TMR3 :16;
[; ;pic18f452.h: 1400: };
[; ;pic18f452.h: 1401: } TMR3bits @ 0xFB2;
[; ;pic18f452.h: 1404: extern volatile unsigned char TMR3L @ 0xFB2;
"1406
[; ;pic18f452.h: 1406: asm("TMR3L equ 0FB2h");
[; <" TMR3L equ 0FB2h ;# ">
[; ;pic18f452.h: 1409: extern volatile union {
[; ;pic18f452.h: 1410: struct {
[; ;pic18f452.h: 1411: unsigned TMR3L :8;
[; ;pic18f452.h: 1412: };
[; ;pic18f452.h: 1413: } TMR3Lbits @ 0xFB2;
[; ;pic18f452.h: 1416: extern volatile unsigned char TMR3H @ 0xFB3;
"1418
[; ;pic18f452.h: 1418: asm("TMR3H equ 0FB3h");
[; <" TMR3H equ 0FB3h ;# ">
[; ;pic18f452.h: 1421: extern volatile union {
[; ;pic18f452.h: 1422: struct {
[; ;pic18f452.h: 1423: unsigned TMR3H :8;
[; ;pic18f452.h: 1424: };
[; ;pic18f452.h: 1425: } TMR3Hbits @ 0xFB3;
[; ;pic18f452.h: 1428: extern volatile unsigned char CCP2CON @ 0xFBA;
"1430
[; ;pic18f452.h: 1430: asm("CCP2CON equ 0FBAh");
[; <" CCP2CON equ 0FBAh ;# ">
[; ;pic18f452.h: 1433: extern volatile union {
[; ;pic18f452.h: 1434: struct {
[; ;pic18f452.h: 1435: unsigned CCP2M :4;
[; ;pic18f452.h: 1436: unsigned DC2B :2;
[; ;pic18f452.h: 1437: };
[; ;pic18f452.h: 1438: struct {
[; ;pic18f452.h: 1439: unsigned CCP2M0 :1;
[; ;pic18f452.h: 1440: unsigned CCP2M1 :1;
[; ;pic18f452.h: 1441: unsigned CCP2M2 :1;
[; ;pic18f452.h: 1442: unsigned CCP2M3 :1;
[; ;pic18f452.h: 1443: unsigned DC2B0 :1;
[; ;pic18f452.h: 1444: unsigned DC2B1 :1;
[; ;pic18f452.h: 1445: };
[; ;pic18f452.h: 1446: struct {
[; ;pic18f452.h: 1447: unsigned :4;
[; ;pic18f452.h: 1448: unsigned CCP2Y :1;
[; ;pic18f452.h: 1449: unsigned CCP2X :1;
[; ;pic18f452.h: 1450: };
[; ;pic18f452.h: 1451: struct {
[; ;pic18f452.h: 1452: unsigned :5;
[; ;pic18f452.h: 1453: unsigned DCCPX :1;
[; ;pic18f452.h: 1454: };
[; ;pic18f452.h: 1455: } CCP2CONbits @ 0xFBA;
[; ;pic18f452.h: 1458: extern volatile unsigned short CCPR2 @ 0xFBB;
"1460
[; ;pic18f452.h: 1460: asm("CCPR2 equ 0FBBh");
[; <" CCPR2 equ 0FBBh ;# ">
[; ;pic18f452.h: 1463: extern volatile union {
[; ;pic18f452.h: 1464: struct {
[; ;pic18f452.h: 1465: unsigned CCPR2 :16;
[; ;pic18f452.h: 1466: };
[; ;pic18f452.h: 1467: } CCPR2bits @ 0xFBB;
[; ;pic18f452.h: 1470: extern volatile unsigned char CCPR2L @ 0xFBB;
"1472
[; ;pic18f452.h: 1472: asm("CCPR2L equ 0FBBh");
[; <" CCPR2L equ 0FBBh ;# ">
[; ;pic18f452.h: 1475: extern volatile union {
[; ;pic18f452.h: 1476: struct {
[; ;pic18f452.h: 1477: unsigned CCPR2L :8;
[; ;pic18f452.h: 1478: };
[; ;pic18f452.h: 1479: } CCPR2Lbits @ 0xFBB;
[; ;pic18f452.h: 1482: extern volatile unsigned char CCPR2H @ 0xFBC;
"1484
[; ;pic18f452.h: 1484: asm("CCPR2H equ 0FBCh");
[; <" CCPR2H equ 0FBCh ;# ">
[; ;pic18f452.h: 1487: extern volatile union {
[; ;pic18f452.h: 1488: struct {
[; ;pic18f452.h: 1489: unsigned CCPR2H :8;
[; ;pic18f452.h: 1490: };
[; ;pic18f452.h: 1491: } CCPR2Hbits @ 0xFBC;
[; ;pic18f452.h: 1494: extern volatile unsigned char CCP1CON @ 0xFBD;
"1496
[; ;pic18f452.h: 1496: asm("CCP1CON equ 0FBDh");
[; <" CCP1CON equ 0FBDh ;# ">
[; ;pic18f452.h: 1499: extern volatile union {
[; ;pic18f452.h: 1500: struct {
[; ;pic18f452.h: 1501: unsigned CCP1M :4;
[; ;pic18f452.h: 1502: unsigned DC1B :2;
[; ;pic18f452.h: 1503: };
[; ;pic18f452.h: 1504: struct {
[; ;pic18f452.h: 1505: unsigned CCP1M0 :1;
[; ;pic18f452.h: 1506: unsigned CCP1M1 :1;
[; ;pic18f452.h: 1507: unsigned CCP1M2 :1;
[; ;pic18f452.h: 1508: unsigned CCP1M3 :1;
[; ;pic18f452.h: 1509: unsigned DC1B0 :1;
[; ;pic18f452.h: 1510: unsigned DC1B1 :1;
[; ;pic18f452.h: 1511: };
[; ;pic18f452.h: 1512: struct {
[; ;pic18f452.h: 1513: unsigned :4;
[; ;pic18f452.h: 1514: unsigned CCP1Y :1;
[; ;pic18f452.h: 1515: unsigned CCP1X :1;
[; ;pic18f452.h: 1516: };
[; ;pic18f452.h: 1517: } CCP1CONbits @ 0xFBD;
[; ;pic18f452.h: 1520: extern volatile unsigned short CCPR1 @ 0xFBE;
"1522
[; ;pic18f452.h: 1522: asm("CCPR1 equ 0FBEh");
[; <" CCPR1 equ 0FBEh ;# ">
[; ;pic18f452.h: 1525: extern volatile union {
[; ;pic18f452.h: 1526: struct {
[; ;pic18f452.h: 1527: unsigned CCPR1 :16;
[; ;pic18f452.h: 1528: };
[; ;pic18f452.h: 1529: } CCPR1bits @ 0xFBE;
[; ;pic18f452.h: 1532: extern volatile unsigned char CCPR1L @ 0xFBE;
"1534
[; ;pic18f452.h: 1534: asm("CCPR1L equ 0FBEh");
[; <" CCPR1L equ 0FBEh ;# ">
[; ;pic18f452.h: 1537: extern volatile union {
[; ;pic18f452.h: 1538: struct {
[; ;pic18f452.h: 1539: unsigned CCPR1L :8;
[; ;pic18f452.h: 1540: };
[; ;pic18f452.h: 1541: } CCPR1Lbits @ 0xFBE;
[; ;pic18f452.h: 1544: extern volatile unsigned char CCPR1H @ 0xFBF;
"1546
[; ;pic18f452.h: 1546: asm("CCPR1H equ 0FBFh");
[; <" CCPR1H equ 0FBFh ;# ">
[; ;pic18f452.h: 1549: extern volatile union {
[; ;pic18f452.h: 1550: struct {
[; ;pic18f452.h: 1551: unsigned CCPR1H :8;
[; ;pic18f452.h: 1552: };
[; ;pic18f452.h: 1553: } CCPR1Hbits @ 0xFBF;
[; ;pic18f452.h: 1556: extern volatile unsigned char ADCON1 @ 0xFC1;
"1558
[; ;pic18f452.h: 1558: asm("ADCON1 equ 0FC1h");
[; <" ADCON1 equ 0FC1h ;# ">
[; ;pic18f452.h: 1561: extern volatile union {
[; ;pic18f452.h: 1562: struct {
[; ;pic18f452.h: 1563: unsigned PCFG :4;
[; ;pic18f452.h: 1564: unsigned :2;
[; ;pic18f452.h: 1565: unsigned ADCS2 :1;
[; ;pic18f452.h: 1566: unsigned ADFM :1;
[; ;pic18f452.h: 1567: };
[; ;pic18f452.h: 1568: struct {
[; ;pic18f452.h: 1569: unsigned PCFG0 :1;
[; ;pic18f452.h: 1570: unsigned PCFG1 :1;
[; ;pic18f452.h: 1571: unsigned PCFG2 :1;
[; ;pic18f452.h: 1572: unsigned PCFG3 :1;
[; ;pic18f452.h: 1573: };
[; ;pic18f452.h: 1574: struct {
[; ;pic18f452.h: 1575: unsigned :3;
[; ;pic18f452.h: 1576: unsigned CHSN3 :1;
[; ;pic18f452.h: 1577: };
[; ;pic18f452.h: 1578: } ADCON1bits @ 0xFC1;
[; ;pic18f452.h: 1581: extern volatile unsigned char ADCON0 @ 0xFC2;
"1583
[; ;pic18f452.h: 1583: asm("ADCON0 equ 0FC2h");
[; <" ADCON0 equ 0FC2h ;# ">
[; ;pic18f452.h: 1586: extern volatile union {
[; ;pic18f452.h: 1587: struct {
[; ;pic18f452.h: 1588: unsigned :2;
[; ;pic18f452.h: 1589: unsigned GO_NOT_DONE :1;
[; ;pic18f452.h: 1590: };
[; ;pic18f452.h: 1591: struct {
[; ;pic18f452.h: 1592: unsigned ADON :1;
[; ;pic18f452.h: 1593: unsigned :1;
[; ;pic18f452.h: 1594: unsigned GO_nDONE :1;
[; ;pic18f452.h: 1595: unsigned CHS :3;
[; ;pic18f452.h: 1596: unsigned ADCS :2;
[; ;pic18f452.h: 1597: };
[; ;pic18f452.h: 1598: struct {
[; ;pic18f452.h: 1599: unsigned :2;
[; ;pic18f452.h: 1600: unsigned GO_NOT_DONE :1;
[; ;pic18f452.h: 1601: };
[; ;pic18f452.h: 1602: struct {
[; ;pic18f452.h: 1603: unsigned ADON :1;
[; ;pic18f452.h: 1604: unsigned :1;
[; ;pic18f452.h: 1605: unsigned GO_nDONE :1;
[; ;pic18f452.h: 1606: unsigned CHS :3;
[; ;pic18f452.h: 1607: unsigned ADCS :2;
[; ;pic18f452.h: 1608: };
[; ;pic18f452.h: 1609: struct {
[; ;pic18f452.h: 1610: unsigned :2;
[; ;pic18f452.h: 1611: unsigned GO :1;
[; ;pic18f452.h: 1612: unsigned CHS0 :1;
[; ;pic18f452.h: 1613: unsigned CHS1 :1;
[; ;pic18f452.h: 1614: unsigned CHS2 :1;
[; ;pic18f452.h: 1615: unsigned ADCS0 :1;
[; ;pic18f452.h: 1616: unsigned ADCS1 :1;
[; ;pic18f452.h: 1617: };
[; ;pic18f452.h: 1618: struct {
[; ;pic18f452.h: 1619: unsigned :2;
[; ;pic18f452.h: 1620: unsigned NOT_DONE :1;
[; ;pic18f452.h: 1621: };
[; ;pic18f452.h: 1622: struct {
[; ;pic18f452.h: 1623: unsigned :2;
[; ;pic18f452.h: 1624: unsigned nDONE :1;
[; ;pic18f452.h: 1625: };
[; ;pic18f452.h: 1626: struct {
[; ;pic18f452.h: 1627: unsigned :2;
[; ;pic18f452.h: 1628: unsigned DONE :1;
[; ;pic18f452.h: 1629: };
[; ;pic18f452.h: 1630: struct {
[; ;pic18f452.h: 1631: unsigned :2;
[; ;pic18f452.h: 1632: unsigned GO_DONE :1;
[; ;pic18f452.h: 1633: };
[; ;pic18f452.h: 1634: struct {
[; ;pic18f452.h: 1635: unsigned :7;
[; ;pic18f452.h: 1636: unsigned ADCAL :1;
[; ;pic18f452.h: 1637: };
[; ;pic18f452.h: 1638: struct {
[; ;pic18f452.h: 1639: unsigned :2;
[; ;pic18f452.h: 1640: unsigned GODONE :1;
[; ;pic18f452.h: 1641: };
[; ;pic18f452.h: 1642: } ADCON0bits @ 0xFC2;
[; ;pic18f452.h: 1645: extern volatile unsigned short ADRES @ 0xFC3;
"1647
[; ;pic18f452.h: 1647: asm("ADRES equ 0FC3h");
[; <" ADRES equ 0FC3h ;# ">
[; ;pic18f452.h: 1650: extern volatile union {
[; ;pic18f452.h: 1651: struct {
[; ;pic18f452.h: 1652: unsigned ADRES :16;
[; ;pic18f452.h: 1653: };
[; ;pic18f452.h: 1654: } ADRESbits @ 0xFC3;
[; ;pic18f452.h: 1657: extern volatile unsigned char ADRESL @ 0xFC3;
"1659
[; ;pic18f452.h: 1659: asm("ADRESL equ 0FC3h");
[; <" ADRESL equ 0FC3h ;# ">
[; ;pic18f452.h: 1662: extern volatile union {
[; ;pic18f452.h: 1663: struct {
[; ;pic18f452.h: 1664: unsigned ADRESL :8;
[; ;pic18f452.h: 1665: };
[; ;pic18f452.h: 1666: } ADRESLbits @ 0xFC3;
[; ;pic18f452.h: 1669: extern volatile unsigned char ADRESH @ 0xFC4;
"1671
[; ;pic18f452.h: 1671: asm("ADRESH equ 0FC4h");
[; <" ADRESH equ 0FC4h ;# ">
[; ;pic18f452.h: 1674: extern volatile union {
[; ;pic18f452.h: 1675: struct {
[; ;pic18f452.h: 1676: unsigned ADRESH :8;
[; ;pic18f452.h: 1677: };
[; ;pic18f452.h: 1678: } ADRESHbits @ 0xFC4;
[; ;pic18f452.h: 1681: extern volatile unsigned char SSPCON2 @ 0xFC5;
"1683
[; ;pic18f452.h: 1683: asm("SSPCON2 equ 0FC5h");
[; <" SSPCON2 equ 0FC5h ;# ">
[; ;pic18f452.h: 1686: extern volatile union {
[; ;pic18f452.h: 1687: struct {
[; ;pic18f452.h: 1688: unsigned SEN :1;
[; ;pic18f452.h: 1689: unsigned RSEN :1;
[; ;pic18f452.h: 1690: unsigned PEN :1;
[; ;pic18f452.h: 1691: unsigned RCEN :1;
[; ;pic18f452.h: 1692: unsigned ACKEN :1;
[; ;pic18f452.h: 1693: unsigned ACKDT :1;
[; ;pic18f452.h: 1694: unsigned ACKSTAT :1;
[; ;pic18f452.h: 1695: unsigned GCEN :1;
[; ;pic18f452.h: 1696: };
[; ;pic18f452.h: 1697: } SSPCON2bits @ 0xFC5;
[; ;pic18f452.h: 1700: extern volatile unsigned char SSPCON1 @ 0xFC6;
"1702
[; ;pic18f452.h: 1702: asm("SSPCON1 equ 0FC6h");
[; <" SSPCON1 equ 0FC6h ;# ">
[; ;pic18f452.h: 1705: extern volatile union {
[; ;pic18f452.h: 1706: struct {
[; ;pic18f452.h: 1707: unsigned SSPM :4;
[; ;pic18f452.h: 1708: unsigned CKP :1;
[; ;pic18f452.h: 1709: unsigned SSPEN :1;
[; ;pic18f452.h: 1710: unsigned SSPOV :1;
[; ;pic18f452.h: 1711: unsigned WCOL :1;
[; ;pic18f452.h: 1712: };
[; ;pic18f452.h: 1713: struct {
[; ;pic18f452.h: 1714: unsigned SSPM0 :1;
[; ;pic18f452.h: 1715: unsigned SSPM1 :1;
[; ;pic18f452.h: 1716: unsigned SSPM2 :1;
[; ;pic18f452.h: 1717: unsigned SSPM3 :1;
[; ;pic18f452.h: 1718: };
[; ;pic18f452.h: 1719: } SSPCON1bits @ 0xFC6;
[; ;pic18f452.h: 1722: extern volatile unsigned char SSPSTAT @ 0xFC7;
"1724
[; ;pic18f452.h: 1724: asm("SSPSTAT equ 0FC7h");
[; <" SSPSTAT equ 0FC7h ;# ">
[; ;pic18f452.h: 1727: extern volatile union {
[; ;pic18f452.h: 1728: struct {
[; ;pic18f452.h: 1729: unsigned :2;
[; ;pic18f452.h: 1730: unsigned R_NOT_W :1;
[; ;pic18f452.h: 1731: };
[; ;pic18f452.h: 1732: struct {
[; ;pic18f452.h: 1733: unsigned :5;
[; ;pic18f452.h: 1734: unsigned D_NOT_A :1;
[; ;pic18f452.h: 1735: };
[; ;pic18f452.h: 1736: struct {
[; ;pic18f452.h: 1737: unsigned BF :1;
[; ;pic18f452.h: 1738: unsigned UA :1;
[; ;pic18f452.h: 1739: unsigned R_nW :1;
[; ;pic18f452.h: 1740: unsigned S :1;
[; ;pic18f452.h: 1741: unsigned P :1;
[; ;pic18f452.h: 1742: unsigned D_nA :1;
[; ;pic18f452.h: 1743: unsigned CKE :1;
[; ;pic18f452.h: 1744: unsigned SMP :1;
[; ;pic18f452.h: 1745: };
[; ;pic18f452.h: 1746: struct {
[; ;pic18f452.h: 1747: unsigned :2;
[; ;pic18f452.h: 1748: unsigned R_NOT_W :1;
[; ;pic18f452.h: 1749: };
[; ;pic18f452.h: 1750: struct {
[; ;pic18f452.h: 1751: unsigned :5;
[; ;pic18f452.h: 1752: unsigned D_NOT_A :1;
[; ;pic18f452.h: 1753: };
[; ;pic18f452.h: 1754: struct {
[; ;pic18f452.h: 1755: unsigned BF :1;
[; ;pic18f452.h: 1756: unsigned UA :1;
[; ;pic18f452.h: 1757: unsigned R_nW :1;
[; ;pic18f452.h: 1758: unsigned S :1;
[; ;pic18f452.h: 1759: unsigned P :1;
[; ;pic18f452.h: 1760: unsigned D_nA :1;
[; ;pic18f452.h: 1761: unsigned CKE :1;
[; ;pic18f452.h: 1762: unsigned SMP :1;
[; ;pic18f452.h: 1763: };
[; ;pic18f452.h: 1764: struct {
[; ;pic18f452.h: 1765: unsigned :2;
[; ;pic18f452.h: 1766: unsigned I2C_READ :1;
[; ;pic18f452.h: 1767: unsigned I2C_START :1;
[; ;pic18f452.h: 1768: unsigned I2C_STOP :1;
[; ;pic18f452.h: 1769: unsigned I2C_DATA :1;
[; ;pic18f452.h: 1770: };
[; ;pic18f452.h: 1771: struct {
[; ;pic18f452.h: 1772: unsigned :2;
[; ;pic18f452.h: 1773: unsigned R :1;
[; ;pic18f452.h: 1774: unsigned :2;
[; ;pic18f452.h: 1775: unsigned D :1;
[; ;pic18f452.h: 1776: };
[; ;pic18f452.h: 1777: struct {
[; ;pic18f452.h: 1778: unsigned :2;
[; ;pic18f452.h: 1779: unsigned READ_WRITE :1;
[; ;pic18f452.h: 1780: unsigned :2;
[; ;pic18f452.h: 1781: unsigned DATA_ADDRESS :1;
[; ;pic18f452.h: 1782: };
[; ;pic18f452.h: 1783: struct {
[; ;pic18f452.h: 1784: unsigned :2;
[; ;pic18f452.h: 1785: unsigned NOT_WRITE :1;
[; ;pic18f452.h: 1786: };
[; ;pic18f452.h: 1787: struct {
[; ;pic18f452.h: 1788: unsigned :5;
[; ;pic18f452.h: 1789: unsigned NOT_ADDRESS :1;
[; ;pic18f452.h: 1790: };
[; ;pic18f452.h: 1791: struct {
[; ;pic18f452.h: 1792: unsigned :2;
[; ;pic18f452.h: 1793: unsigned nWRITE :1;
[; ;pic18f452.h: 1794: unsigned :2;
[; ;pic18f452.h: 1795: unsigned nADDRESS :1;
[; ;pic18f452.h: 1796: };
[; ;pic18f452.h: 1797: struct {
[; ;pic18f452.h: 1798: unsigned :2;
[; ;pic18f452.h: 1799: unsigned nW :1;
[; ;pic18f452.h: 1800: unsigned :2;
[; ;pic18f452.h: 1801: unsigned nA :1;
[; ;pic18f452.h: 1802: };
[; ;pic18f452.h: 1803: struct {
[; ;pic18f452.h: 1804: unsigned :2;
[; ;pic18f452.h: 1805: unsigned R_W :1;
[; ;pic18f452.h: 1806: unsigned :2;
[; ;pic18f452.h: 1807: unsigned D_A :1;
[; ;pic18f452.h: 1808: };
[; ;pic18f452.h: 1809: struct {
[; ;pic18f452.h: 1810: unsigned :5;
[; ;pic18f452.h: 1811: unsigned I2C_DAT :1;
[; ;pic18f452.h: 1812: };
[; ;pic18f452.h: 1813: struct {
[; ;pic18f452.h: 1814: unsigned :5;
[; ;pic18f452.h: 1815: unsigned DA :1;
[; ;pic18f452.h: 1816: };
[; ;pic18f452.h: 1817: struct {
[; ;pic18f452.h: 1818: unsigned :2;
[; ;pic18f452.h: 1819: unsigned RW :1;
[; ;pic18f452.h: 1820: };
[; ;pic18f452.h: 1821: struct {
[; ;pic18f452.h: 1822: unsigned :3;
[; ;pic18f452.h: 1823: unsigned START :1;
[; ;pic18f452.h: 1824: };
[; ;pic18f452.h: 1825: struct {
[; ;pic18f452.h: 1826: unsigned :4;
[; ;pic18f452.h: 1827: unsigned STOP :1;
[; ;pic18f452.h: 1828: };
[; ;pic18f452.h: 1829: struct {
[; ;pic18f452.h: 1830: unsigned :2;
[; ;pic18f452.h: 1831: unsigned NOT_W :1;
[; ;pic18f452.h: 1832: };
[; ;pic18f452.h: 1833: struct {
[; ;pic18f452.h: 1834: unsigned :5;
[; ;pic18f452.h: 1835: unsigned NOT_A :1;
[; ;pic18f452.h: 1836: };
[; ;pic18f452.h: 1837: } SSPSTATbits @ 0xFC7;
[; ;pic18f452.h: 1840: extern volatile unsigned char SSPADD @ 0xFC8;
"1842
[; ;pic18f452.h: 1842: asm("SSPADD equ 0FC8h");
[; <" SSPADD equ 0FC8h ;# ">
[; ;pic18f452.h: 1845: extern volatile union {
[; ;pic18f452.h: 1846: struct {
[; ;pic18f452.h: 1847: unsigned SSPADD :8;
[; ;pic18f452.h: 1848: };
[; ;pic18f452.h: 1849: } SSPADDbits @ 0xFC8;
[; ;pic18f452.h: 1852: extern volatile unsigned char SSPBUF @ 0xFC9;
"1854
[; ;pic18f452.h: 1854: asm("SSPBUF equ 0FC9h");
[; <" SSPBUF equ 0FC9h ;# ">
[; ;pic18f452.h: 1857: extern volatile union {
[; ;pic18f452.h: 1858: struct {
[; ;pic18f452.h: 1859: unsigned SSPBUF :8;
[; ;pic18f452.h: 1860: };
[; ;pic18f452.h: 1861: } SSPBUFbits @ 0xFC9;
[; ;pic18f452.h: 1864: extern volatile unsigned char T2CON @ 0xFCA;
"1866
[; ;pic18f452.h: 1866: asm("T2CON equ 0FCAh");
[; <" T2CON equ 0FCAh ;# ">
[; ;pic18f452.h: 1869: extern volatile union {
[; ;pic18f452.h: 1870: struct {
[; ;pic18f452.h: 1871: unsigned T2CKPS :2;
[; ;pic18f452.h: 1872: unsigned TMR2ON :1;
[; ;pic18f452.h: 1873: unsigned TOUTPS :4;
[; ;pic18f452.h: 1874: };
[; ;pic18f452.h: 1875: struct {
[; ;pic18f452.h: 1876: unsigned T2CKPS0 :1;
[; ;pic18f452.h: 1877: unsigned T2CKPS1 :1;
[; ;pic18f452.h: 1878: unsigned :1;
[; ;pic18f452.h: 1879: unsigned TOUTPS0 :1;
[; ;pic18f452.h: 1880: unsigned TOUTPS1 :1;
[; ;pic18f452.h: 1881: unsigned TOUTPS2 :1;
[; ;pic18f452.h: 1882: unsigned TOUTPS3 :1;
[; ;pic18f452.h: 1883: };
[; ;pic18f452.h: 1884: } T2CONbits @ 0xFCA;
[; ;pic18f452.h: 1887: extern volatile unsigned char PR2 @ 0xFCB;
"1889
[; ;pic18f452.h: 1889: asm("PR2 equ 0FCBh");
[; <" PR2 equ 0FCBh ;# ">
[; ;pic18f452.h: 1892: extern volatile unsigned char MEMCON @ 0xFCB;
"1894
[; ;pic18f452.h: 1894: asm("MEMCON equ 0FCBh");
[; <" MEMCON equ 0FCBh ;# ">
[; ;pic18f452.h: 1897: extern volatile union {
[; ;pic18f452.h: 1898: struct {
[; ;pic18f452.h: 1899: unsigned PR2 :8;
[; ;pic18f452.h: 1900: };
[; ;pic18f452.h: 1901: } PR2bits @ 0xFCB;
[; ;pic18f452.h: 1903: extern volatile union {
[; ;pic18f452.h: 1904: struct {
[; ;pic18f452.h: 1905: unsigned PR2 :8;
[; ;pic18f452.h: 1906: };
[; ;pic18f452.h: 1907: } MEMCONbits @ 0xFCB;
[; ;pic18f452.h: 1910: extern volatile unsigned char TMR2 @ 0xFCC;
"1912
[; ;pic18f452.h: 1912: asm("TMR2 equ 0FCCh");
[; <" TMR2 equ 0FCCh ;# ">
[; ;pic18f452.h: 1915: extern volatile union {
[; ;pic18f452.h: 1916: struct {
[; ;pic18f452.h: 1917: unsigned TMR2 :8;
[; ;pic18f452.h: 1918: };
[; ;pic18f452.h: 1919: } TMR2bits @ 0xFCC;
[; ;pic18f452.h: 1922: extern volatile unsigned char T1CON @ 0xFCD;
"1924
[; ;pic18f452.h: 1924: asm("T1CON equ 0FCDh");
[; <" T1CON equ 0FCDh ;# ">
[; ;pic18f452.h: 1927: extern volatile union {
[; ;pic18f452.h: 1928: struct {
[; ;pic18f452.h: 1929: unsigned :2;
[; ;pic18f452.h: 1930: unsigned NOT_T1SYNC :1;
[; ;pic18f452.h: 1931: };
[; ;pic18f452.h: 1932: struct {
[; ;pic18f452.h: 1933: unsigned TMR1ON :1;
[; ;pic18f452.h: 1934: unsigned TMR1CS :1;
[; ;pic18f452.h: 1935: unsigned nT1SYNC :1;
[; ;pic18f452.h: 1936: unsigned T1OSCEN :1;
[; ;pic18f452.h: 1937: unsigned T1CKPS :2;
[; ;pic18f452.h: 1938: unsigned :1;
[; ;pic18f452.h: 1939: unsigned RD16 :1;
[; ;pic18f452.h: 1940: };
[; ;pic18f452.h: 1941: struct {
[; ;pic18f452.h: 1942: unsigned :2;
[; ;pic18f452.h: 1943: unsigned T1SYNC :1;
[; ;pic18f452.h: 1944: unsigned :1;
[; ;pic18f452.h: 1945: unsigned T1CKPS0 :1;
[; ;pic18f452.h: 1946: unsigned T1CKPS1 :1;
[; ;pic18f452.h: 1947: };
[; ;pic18f452.h: 1948: struct {
[; ;pic18f452.h: 1949: unsigned :2;
[; ;pic18f452.h: 1950: unsigned T1INSYNC :1;
[; ;pic18f452.h: 1951: };
[; ;pic18f452.h: 1952: struct {
[; ;pic18f452.h: 1953: unsigned :3;
[; ;pic18f452.h: 1954: unsigned SOSCEN :1;
[; ;pic18f452.h: 1955: };
[; ;pic18f452.h: 1956: struct {
[; ;pic18f452.h: 1957: unsigned :7;
[; ;pic18f452.h: 1958: unsigned T1RD16 :1;
[; ;pic18f452.h: 1959: };
[; ;pic18f452.h: 1960: } T1CONbits @ 0xFCD;
[; ;pic18f452.h: 1963: extern volatile unsigned short TMR1 @ 0xFCE;
"1965
[; ;pic18f452.h: 1965: asm("TMR1 equ 0FCEh");
[; <" TMR1 equ 0FCEh ;# ">
[; ;pic18f452.h: 1968: extern volatile union {
[; ;pic18f452.h: 1969: struct {
[; ;pic18f452.h: 1970: unsigned TMR1 :16;
[; ;pic18f452.h: 1971: };
[; ;pic18f452.h: 1972: } TMR1bits @ 0xFCE;
[; ;pic18f452.h: 1975: extern volatile unsigned char TMR1L @ 0xFCE;
"1977
[; ;pic18f452.h: 1977: asm("TMR1L equ 0FCEh");
[; <" TMR1L equ 0FCEh ;# ">
[; ;pic18f452.h: 1980: extern volatile union {
[; ;pic18f452.h: 1981: struct {
[; ;pic18f452.h: 1982: unsigned TMR1L :8;
[; ;pic18f452.h: 1983: };
[; ;pic18f452.h: 1984: } TMR1Lbits @ 0xFCE;
[; ;pic18f452.h: 1987: extern volatile unsigned char TMR1H @ 0xFCF;
"1989
[; ;pic18f452.h: 1989: asm("TMR1H equ 0FCFh");
[; <" TMR1H equ 0FCFh ;# ">
[; ;pic18f452.h: 1992: extern volatile union {
[; ;pic18f452.h: 1993: struct {
[; ;pic18f452.h: 1994: unsigned TMR1H :8;
[; ;pic18f452.h: 1995: };
[; ;pic18f452.h: 1996: } TMR1Hbits @ 0xFCF;
[; ;pic18f452.h: 1999: extern volatile unsigned char RCON @ 0xFD0;
"2001
[; ;pic18f452.h: 2001: asm("RCON equ 0FD0h");
[; <" RCON equ 0FD0h ;# ">
[; ;pic18f452.h: 2004: extern volatile union {
[; ;pic18f452.h: 2005: struct {
[; ;pic18f452.h: 2006: unsigned NOT_BOR :1;
[; ;pic18f452.h: 2007: };
[; ;pic18f452.h: 2008: struct {
[; ;pic18f452.h: 2009: unsigned :1;
[; ;pic18f452.h: 2010: unsigned NOT_POR :1;
[; ;pic18f452.h: 2011: };
[; ;pic18f452.h: 2012: struct {
[; ;pic18f452.h: 2013: unsigned :2;
[; ;pic18f452.h: 2014: unsigned NOT_PD :1;
[; ;pic18f452.h: 2015: };
[; ;pic18f452.h: 2016: struct {
[; ;pic18f452.h: 2017: unsigned :3;
[; ;pic18f452.h: 2018: unsigned NOT_TO :1;
[; ;pic18f452.h: 2019: };
[; ;pic18f452.h: 2020: struct {
[; ;pic18f452.h: 2021: unsigned :4;
[; ;pic18f452.h: 2022: unsigned NOT_RI :1;
[; ;pic18f452.h: 2023: };
[; ;pic18f452.h: 2024: struct {
[; ;pic18f452.h: 2025: unsigned nBOR :1;
[; ;pic18f452.h: 2026: unsigned nPOR :1;
[; ;pic18f452.h: 2027: unsigned nPD :1;
[; ;pic18f452.h: 2028: unsigned nTO :1;
[; ;pic18f452.h: 2029: unsigned nRI :1;
[; ;pic18f452.h: 2030: unsigned :2;
[; ;pic18f452.h: 2031: unsigned IPEN :1;
[; ;pic18f452.h: 2032: };
[; ;pic18f452.h: 2033: struct {
[; ;pic18f452.h: 2034: unsigned :7;
[; ;pic18f452.h: 2035: unsigned NOT_IPEN :1;
[; ;pic18f452.h: 2036: };
[; ;pic18f452.h: 2037: struct {
[; ;pic18f452.h: 2038: unsigned BOR :1;
[; ;pic18f452.h: 2039: unsigned POR :1;
[; ;pic18f452.h: 2040: unsigned PD :1;
[; ;pic18f452.h: 2041: unsigned TO :1;
[; ;pic18f452.h: 2042: unsigned RI :1;
[; ;pic18f452.h: 2043: unsigned :2;
[; ;pic18f452.h: 2044: unsigned nIPEN :1;
[; ;pic18f452.h: 2045: };
[; ;pic18f452.h: 2046: } RCONbits @ 0xFD0;
[; ;pic18f452.h: 2049: extern volatile unsigned char WDTCON @ 0xFD1;
"2051
[; ;pic18f452.h: 2051: asm("WDTCON equ 0FD1h");
[; <" WDTCON equ 0FD1h ;# ">
[; ;pic18f452.h: 2054: extern volatile union {
[; ;pic18f452.h: 2055: struct {
[; ;pic18f452.h: 2056: unsigned SWDTEN :1;
[; ;pic18f452.h: 2057: };
[; ;pic18f452.h: 2058: struct {
[; ;pic18f452.h: 2059: unsigned SWDTE :1;
[; ;pic18f452.h: 2060: };
[; ;pic18f452.h: 2061: } WDTCONbits @ 0xFD1;
[; ;pic18f452.h: 2064: extern volatile unsigned char LVDCON @ 0xFD2;
"2066
[; ;pic18f452.h: 2066: asm("LVDCON equ 0FD2h");
[; <" LVDCON equ 0FD2h ;# ">
[; ;pic18f452.h: 2069: extern volatile union {
[; ;pic18f452.h: 2070: struct {
[; ;pic18f452.h: 2071: unsigned LVDL :4;
[; ;pic18f452.h: 2072: unsigned LVDEN :1;
[; ;pic18f452.h: 2073: unsigned IRVST :1;
[; ;pic18f452.h: 2074: };
[; ;pic18f452.h: 2075: struct {
[; ;pic18f452.h: 2076: unsigned LVDL0 :1;
[; ;pic18f452.h: 2077: unsigned LVDL1 :1;
[; ;pic18f452.h: 2078: unsigned LVDL2 :1;
[; ;pic18f452.h: 2079: unsigned LVDL3 :1;
[; ;pic18f452.h: 2080: };
[; ;pic18f452.h: 2081: } LVDCONbits @ 0xFD2;
[; ;pic18f452.h: 2084: extern volatile unsigned char OSCCON @ 0xFD3;
"2086
[; ;pic18f452.h: 2086: asm("OSCCON equ 0FD3h");
[; <" OSCCON equ 0FD3h ;# ">
[; ;pic18f452.h: 2089: extern volatile union {
[; ;pic18f452.h: 2090: struct {
[; ;pic18f452.h: 2091: unsigned SCS :1;
[; ;pic18f452.h: 2092: };
[; ;pic18f452.h: 2093: } OSCCONbits @ 0xFD3;
[; ;pic18f452.h: 2096: extern volatile unsigned char T0CON @ 0xFD5;
"2098
[; ;pic18f452.h: 2098: asm("T0CON equ 0FD5h");
[; <" T0CON equ 0FD5h ;# ">
[; ;pic18f452.h: 2101: extern volatile union {
[; ;pic18f452.h: 2102: struct {
[; ;pic18f452.h: 2103: unsigned T0PS :3;
[; ;pic18f452.h: 2104: unsigned PSA :1;
[; ;pic18f452.h: 2105: unsigned T0SE :1;
[; ;pic18f452.h: 2106: unsigned T0CS :1;
[; ;pic18f452.h: 2107: unsigned T08BIT :1;
[; ;pic18f452.h: 2108: unsigned TMR0ON :1;
[; ;pic18f452.h: 2109: };
[; ;pic18f452.h: 2110: struct {
[; ;pic18f452.h: 2111: unsigned T0PS0 :1;
[; ;pic18f452.h: 2112: unsigned T0PS1 :1;
[; ;pic18f452.h: 2113: unsigned T0PS2 :1;
[; ;pic18f452.h: 2114: };
[; ;pic18f452.h: 2115: } T0CONbits @ 0xFD5;
[; ;pic18f452.h: 2118: extern volatile unsigned short TMR0 @ 0xFD6;
"2120
[; ;pic18f452.h: 2120: asm("TMR0 equ 0FD6h");
[; <" TMR0 equ 0FD6h ;# ">
[; ;pic18f452.h: 2123: extern volatile union {
[; ;pic18f452.h: 2124: struct {
[; ;pic18f452.h: 2125: unsigned TMR0 :16;
[; ;pic18f452.h: 2126: };
[; ;pic18f452.h: 2127: } TMR0bits @ 0xFD6;
[; ;pic18f452.h: 2130: extern volatile unsigned char TMR0L @ 0xFD6;
"2132
[; ;pic18f452.h: 2132: asm("TMR0L equ 0FD6h");
[; <" TMR0L equ 0FD6h ;# ">
[; ;pic18f452.h: 2135: extern volatile union {
[; ;pic18f452.h: 2136: struct {
[; ;pic18f452.h: 2137: unsigned TMR0L :8;
[; ;pic18f452.h: 2138: };
[; ;pic18f452.h: 2139: } TMR0Lbits @ 0xFD6;
[; ;pic18f452.h: 2142: extern volatile unsigned char TMR0H @ 0xFD7;
"2144
[; ;pic18f452.h: 2144: asm("TMR0H equ 0FD7h");
[; <" TMR0H equ 0FD7h ;# ">
[; ;pic18f452.h: 2147: extern volatile union {
[; ;pic18f452.h: 2148: struct {
[; ;pic18f452.h: 2149: unsigned TMR0H :8;
[; ;pic18f452.h: 2150: };
[; ;pic18f452.h: 2151: } TMR0Hbits @ 0xFD7;
[; ;pic18f452.h: 2154: extern volatile unsigned char STATUS @ 0xFD8;
"2156
[; ;pic18f452.h: 2156: asm("STATUS equ 0FD8h");
[; <" STATUS equ 0FD8h ;# ">
[; ;pic18f452.h: 2159: extern volatile union {
[; ;pic18f452.h: 2160: struct {
[; ;pic18f452.h: 2161: unsigned C :1;
[; ;pic18f452.h: 2162: unsigned DC :1;
[; ;pic18f452.h: 2163: unsigned Z :1;
[; ;pic18f452.h: 2164: unsigned OV :1;
[; ;pic18f452.h: 2165: unsigned N :1;
[; ;pic18f452.h: 2166: };
[; ;pic18f452.h: 2167: struct {
[; ;pic18f452.h: 2168: unsigned CARRY :1;
[; ;pic18f452.h: 2169: };
[; ;pic18f452.h: 2170: struct {
[; ;pic18f452.h: 2171: unsigned :4;
[; ;pic18f452.h: 2172: unsigned NEGATIVE :1;
[; ;pic18f452.h: 2173: };
[; ;pic18f452.h: 2174: struct {
[; ;pic18f452.h: 2175: unsigned :3;
[; ;pic18f452.h: 2176: unsigned OVERFLOW :1;
[; ;pic18f452.h: 2177: };
[; ;pic18f452.h: 2178: struct {
[; ;pic18f452.h: 2179: unsigned :2;
[; ;pic18f452.h: 2180: unsigned ZERO :1;
[; ;pic18f452.h: 2181: };
[; ;pic18f452.h: 2182: } STATUSbits @ 0xFD8;
[; ;pic18f452.h: 2185: extern volatile unsigned short FSR2 @ 0xFD9;
"2187
[; ;pic18f452.h: 2187: asm("FSR2 equ 0FD9h");
[; <" FSR2 equ 0FD9h ;# ">
[; ;pic18f452.h: 2190: extern volatile union {
[; ;pic18f452.h: 2191: struct {
[; ;pic18f452.h: 2192: unsigned FSR2 :12;
[; ;pic18f452.h: 2193: };
[; ;pic18f452.h: 2194: } FSR2bits @ 0xFD9;
[; ;pic18f452.h: 2197: extern volatile unsigned char FSR2L @ 0xFD9;
"2199
[; ;pic18f452.h: 2199: asm("FSR2L equ 0FD9h");
[; <" FSR2L equ 0FD9h ;# ">
[; ;pic18f452.h: 2202: extern volatile union {
[; ;pic18f452.h: 2203: struct {
[; ;pic18f452.h: 2204: unsigned FSR2L :8;
[; ;pic18f452.h: 2205: };
[; ;pic18f452.h: 2206: } FSR2Lbits @ 0xFD9;
[; ;pic18f452.h: 2209: extern volatile unsigned char FSR2H @ 0xFDA;
"2211
[; ;pic18f452.h: 2211: asm("FSR2H equ 0FDAh");
[; <" FSR2H equ 0FDAh ;# ">
[; ;pic18f452.h: 2214: extern volatile union {
[; ;pic18f452.h: 2215: struct {
[; ;pic18f452.h: 2216: unsigned FSR2H :4;
[; ;pic18f452.h: 2217: };
[; ;pic18f452.h: 2218: } FSR2Hbits @ 0xFDA;
[; ;pic18f452.h: 2221: extern volatile unsigned char PLUSW2 @ 0xFDB;
"2223
[; ;pic18f452.h: 2223: asm("PLUSW2 equ 0FDBh");
[; <" PLUSW2 equ 0FDBh ;# ">
[; ;pic18f452.h: 2226: extern volatile union {
[; ;pic18f452.h: 2227: struct {
[; ;pic18f452.h: 2228: unsigned PLUSW2 :8;
[; ;pic18f452.h: 2229: };
[; ;pic18f452.h: 2230: } PLUSW2bits @ 0xFDB;
[; ;pic18f452.h: 2233: extern volatile unsigned char PREINC2 @ 0xFDC;
"2235
[; ;pic18f452.h: 2235: asm("PREINC2 equ 0FDCh");
[; <" PREINC2 equ 0FDCh ;# ">
[; ;pic18f452.h: 2238: extern volatile union {
[; ;pic18f452.h: 2239: struct {
[; ;pic18f452.h: 2240: unsigned PREINC2 :8;
[; ;pic18f452.h: 2241: };
[; ;pic18f452.h: 2242: } PREINC2bits @ 0xFDC;
[; ;pic18f452.h: 2245: extern volatile unsigned char POSTDEC2 @ 0xFDD;
"2247
[; ;pic18f452.h: 2247: asm("POSTDEC2 equ 0FDDh");
[; <" POSTDEC2 equ 0FDDh ;# ">
[; ;pic18f452.h: 2250: extern volatile union {
[; ;pic18f452.h: 2251: struct {
[; ;pic18f452.h: 2252: unsigned POSTDEC2 :8;
[; ;pic18f452.h: 2253: };
[; ;pic18f452.h: 2254: } POSTDEC2bits @ 0xFDD;
[; ;pic18f452.h: 2257: extern volatile unsigned char POSTINC2 @ 0xFDE;
"2259
[; ;pic18f452.h: 2259: asm("POSTINC2 equ 0FDEh");
[; <" POSTINC2 equ 0FDEh ;# ">
[; ;pic18f452.h: 2262: extern volatile union {
[; ;pic18f452.h: 2263: struct {
[; ;pic18f452.h: 2264: unsigned POSTINC2 :8;
[; ;pic18f452.h: 2265: };
[; ;pic18f452.h: 2266: } POSTINC2bits @ 0xFDE;
[; ;pic18f452.h: 2269: extern volatile unsigned char INDF2 @ 0xFDF;
"2271
[; ;pic18f452.h: 2271: asm("INDF2 equ 0FDFh");
[; <" INDF2 equ 0FDFh ;# ">
[; ;pic18f452.h: 2274: extern volatile union {
[; ;pic18f452.h: 2275: struct {
[; ;pic18f452.h: 2276: unsigned INDF2 :8;
[; ;pic18f452.h: 2277: };
[; ;pic18f452.h: 2278: } INDF2bits @ 0xFDF;
[; ;pic18f452.h: 2281: extern volatile unsigned char BSR @ 0xFE0;
"2283
[; ;pic18f452.h: 2283: asm("BSR equ 0FE0h");
[; <" BSR equ 0FE0h ;# ">
[; ;pic18f452.h: 2286: extern volatile union {
[; ;pic18f452.h: 2287: struct {
[; ;pic18f452.h: 2288: unsigned BSR :4;
[; ;pic18f452.h: 2289: };
[; ;pic18f452.h: 2290: } BSRbits @ 0xFE0;
[; ;pic18f452.h: 2293: extern volatile unsigned short FSR1 @ 0xFE1;
"2295
[; ;pic18f452.h: 2295: asm("FSR1 equ 0FE1h");
[; <" FSR1 equ 0FE1h ;# ">
[; ;pic18f452.h: 2298: extern volatile union {
[; ;pic18f452.h: 2299: struct {
[; ;pic18f452.h: 2300: unsigned FSR1 :12;
[; ;pic18f452.h: 2301: };
[; ;pic18f452.h: 2302: } FSR1bits @ 0xFE1;
[; ;pic18f452.h: 2305: extern volatile unsigned char FSR1L @ 0xFE1;
"2307
[; ;pic18f452.h: 2307: asm("FSR1L equ 0FE1h");
[; <" FSR1L equ 0FE1h ;# ">
[; ;pic18f452.h: 2310: extern volatile union {
[; ;pic18f452.h: 2311: struct {
[; ;pic18f452.h: 2312: unsigned FSR1L :8;
[; ;pic18f452.h: 2313: };
[; ;pic18f452.h: 2314: } FSR1Lbits @ 0xFE1;
[; ;pic18f452.h: 2317: extern volatile unsigned char FSR1H @ 0xFE2;
"2319
[; ;pic18f452.h: 2319: asm("FSR1H equ 0FE2h");
[; <" FSR1H equ 0FE2h ;# ">
[; ;pic18f452.h: 2322: extern volatile union {
[; ;pic18f452.h: 2323: struct {
[; ;pic18f452.h: 2324: unsigned FSR1H :4;
[; ;pic18f452.h: 2325: };
[; ;pic18f452.h: 2326: } FSR1Hbits @ 0xFE2;
[; ;pic18f452.h: 2329: extern volatile unsigned char PLUSW1 @ 0xFE3;
"2331
[; ;pic18f452.h: 2331: asm("PLUSW1 equ 0FE3h");
[; <" PLUSW1 equ 0FE3h ;# ">
[; ;pic18f452.h: 2334: extern volatile union {
[; ;pic18f452.h: 2335: struct {
[; ;pic18f452.h: 2336: unsigned PLUSW1 :8;
[; ;pic18f452.h: 2337: };
[; ;pic18f452.h: 2338: } PLUSW1bits @ 0xFE3;
[; ;pic18f452.h: 2341: extern volatile unsigned char PREINC1 @ 0xFE4;
"2343
[; ;pic18f452.h: 2343: asm("PREINC1 equ 0FE4h");
[; <" PREINC1 equ 0FE4h ;# ">
[; ;pic18f452.h: 2346: extern volatile union {
[; ;pic18f452.h: 2347: struct {
[; ;pic18f452.h: 2348: unsigned PREINC1 :8;
[; ;pic18f452.h: 2349: };
[; ;pic18f452.h: 2350: } PREINC1bits @ 0xFE4;
[; ;pic18f452.h: 2353: extern volatile unsigned char POSTDEC1 @ 0xFE5;
"2355
[; ;pic18f452.h: 2355: asm("POSTDEC1 equ 0FE5h");
[; <" POSTDEC1 equ 0FE5h ;# ">
[; ;pic18f452.h: 2358: extern volatile union {
[; ;pic18f452.h: 2359: struct {
[; ;pic18f452.h: 2360: unsigned POSTDEC1 :8;
[; ;pic18f452.h: 2361: };
[; ;pic18f452.h: 2362: } POSTDEC1bits @ 0xFE5;
[; ;pic18f452.h: 2365: extern volatile unsigned char POSTINC1 @ 0xFE6;
"2367
[; ;pic18f452.h: 2367: asm("POSTINC1 equ 0FE6h");
[; <" POSTINC1 equ 0FE6h ;# ">
[; ;pic18f452.h: 2370: extern volatile union {
[; ;pic18f452.h: 2371: struct {
[; ;pic18f452.h: 2372: unsigned POSTINC1 :8;
[; ;pic18f452.h: 2373: };
[; ;pic18f452.h: 2374: } POSTINC1bits @ 0xFE6;
[; ;pic18f452.h: 2377: extern volatile unsigned char INDF1 @ 0xFE7;
"2379
[; ;pic18f452.h: 2379: asm("INDF1 equ 0FE7h");
[; <" INDF1 equ 0FE7h ;# ">
[; ;pic18f452.h: 2382: extern volatile union {
[; ;pic18f452.h: 2383: struct {
[; ;pic18f452.h: 2384: unsigned INDF1 :8;
[; ;pic18f452.h: 2385: };
[; ;pic18f452.h: 2386: } INDF1bits @ 0xFE7;
[; ;pic18f452.h: 2389: extern volatile unsigned char WREG @ 0xFE8;
"2391
[; ;pic18f452.h: 2391: asm("WREG equ 0FE8h");
[; <" WREG equ 0FE8h ;# ">
[; ;pic18f452.h: 2399: extern volatile union {
[; ;pic18f452.h: 2400: struct {
[; ;pic18f452.h: 2401: unsigned WREG :8;
[; ;pic18f452.h: 2402: };
[; ;pic18f452.h: 2403: } WREGbits @ 0xFE8;
[; ;pic18f452.h: 2405: extern volatile union {
[; ;pic18f452.h: 2406: struct {
[; ;pic18f452.h: 2407: unsigned WREG :8;
[; ;pic18f452.h: 2408: };
[; ;pic18f452.h: 2409: } Wbits @ 0xFE8;
[; ;pic18f452.h: 2412: extern volatile unsigned short FSR0 @ 0xFE9;
"2414
[; ;pic18f452.h: 2414: asm("FSR0 equ 0FE9h");
[; <" FSR0 equ 0FE9h ;# ">
[; ;pic18f452.h: 2417: extern volatile union {
[; ;pic18f452.h: 2418: struct {
[; ;pic18f452.h: 2419: unsigned FSR0 :12;
[; ;pic18f452.h: 2420: };
[; ;pic18f452.h: 2421: } FSR0bits @ 0xFE9;
[; ;pic18f452.h: 2424: extern volatile unsigned char FSR0L @ 0xFE9;
"2426
[; ;pic18f452.h: 2426: asm("FSR0L equ 0FE9h");
[; <" FSR0L equ 0FE9h ;# ">
[; ;pic18f452.h: 2429: extern volatile union {
[; ;pic18f452.h: 2430: struct {
[; ;pic18f452.h: 2431: unsigned FSR0L :8;
[; ;pic18f452.h: 2432: };
[; ;pic18f452.h: 2433: } FSR0Lbits @ 0xFE9;
[; ;pic18f452.h: 2436: extern volatile unsigned char FSR0H @ 0xFEA;
"2438
[; ;pic18f452.h: 2438: asm("FSR0H equ 0FEAh");
[; <" FSR0H equ 0FEAh ;# ">
[; ;pic18f452.h: 2441: extern volatile union {
[; ;pic18f452.h: 2442: struct {
[; ;pic18f452.h: 2443: unsigned FSR0H :4;
[; ;pic18f452.h: 2444: };
[; ;pic18f452.h: 2445: } FSR0Hbits @ 0xFEA;
[; ;pic18f452.h: 2448: extern volatile unsigned char PLUSW0 @ 0xFEB;
"2450
[; ;pic18f452.h: 2450: asm("PLUSW0 equ 0FEBh");
[; <" PLUSW0 equ 0FEBh ;# ">
[; ;pic18f452.h: 2453: extern volatile union {
[; ;pic18f452.h: 2454: struct {
[; ;pic18f452.h: 2455: unsigned PLUSW0 :8;
[; ;pic18f452.h: 2456: };
[; ;pic18f452.h: 2457: } PLUSW0bits @ 0xFEB;
[; ;pic18f452.h: 2460: extern volatile unsigned char PREINC0 @ 0xFEC;
"2462
[; ;pic18f452.h: 2462: asm("PREINC0 equ 0FECh");
[; <" PREINC0 equ 0FECh ;# ">
[; ;pic18f452.h: 2465: extern volatile union {
[; ;pic18f452.h: 2466: struct {
[; ;pic18f452.h: 2467: unsigned PREINC0 :8;
[; ;pic18f452.h: 2468: };
[; ;pic18f452.h: 2469: } PREINC0bits @ 0xFEC;
[; ;pic18f452.h: 2472: extern volatile unsigned char POSTDEC0 @ 0xFED;
"2474
[; ;pic18f452.h: 2474: asm("POSTDEC0 equ 0FEDh");
[; <" POSTDEC0 equ 0FEDh ;# ">
[; ;pic18f452.h: 2477: extern volatile union {
[; ;pic18f452.h: 2478: struct {
[; ;pic18f452.h: 2479: unsigned POSTDEC0 :8;
[; ;pic18f452.h: 2480: };
[; ;pic18f452.h: 2481: } POSTDEC0bits @ 0xFED;
[; ;pic18f452.h: 2484: extern volatile unsigned char POSTINC0 @ 0xFEE;
"2486
[; ;pic18f452.h: 2486: asm("POSTINC0 equ 0FEEh");
[; <" POSTINC0 equ 0FEEh ;# ">
[; ;pic18f452.h: 2489: extern volatile union {
[; ;pic18f452.h: 2490: struct {
[; ;pic18f452.h: 2491: unsigned POSTINC0 :8;
[; ;pic18f452.h: 2492: };
[; ;pic18f452.h: 2493: } POSTINC0bits @ 0xFEE;
[; ;pic18f452.h: 2496: extern volatile unsigned char INDF0 @ 0xFEF;
"2498
[; ;pic18f452.h: 2498: asm("INDF0 equ 0FEFh");
[; <" INDF0 equ 0FEFh ;# ">
[; ;pic18f452.h: 2501: extern volatile union {
[; ;pic18f452.h: 2502: struct {
[; ;pic18f452.h: 2503: unsigned INDF0 :8;
[; ;pic18f452.h: 2504: };
[; ;pic18f452.h: 2505: } INDF0bits @ 0xFEF;
[; ;pic18f452.h: 2508: extern volatile unsigned char INTCON3 @ 0xFF0;
"2510
[; ;pic18f452.h: 2510: asm("INTCON3 equ 0FF0h");
[; <" INTCON3 equ 0FF0h ;# ">
[; ;pic18f452.h: 2513: extern volatile union {
[; ;pic18f452.h: 2514: struct {
[; ;pic18f452.h: 2515: unsigned INT1IF :1;
[; ;pic18f452.h: 2516: unsigned INT2IF :1;
[; ;pic18f452.h: 2517: unsigned :1;
[; ;pic18f452.h: 2518: unsigned INT1IE :1;
[; ;pic18f452.h: 2519: unsigned INT2IE :1;
[; ;pic18f452.h: 2520: unsigned :1;
[; ;pic18f452.h: 2521: unsigned INT1IP :1;
[; ;pic18f452.h: 2522: unsigned INT2IP :1;
[; ;pic18f452.h: 2523: };
[; ;pic18f452.h: 2524: struct {
[; ;pic18f452.h: 2525: unsigned INT1F :1;
[; ;pic18f452.h: 2526: unsigned INT2F :1;
[; ;pic18f452.h: 2527: unsigned :1;
[; ;pic18f452.h: 2528: unsigned INT1E :1;
[; ;pic18f452.h: 2529: unsigned INT2E :1;
[; ;pic18f452.h: 2530: unsigned :1;
[; ;pic18f452.h: 2531: unsigned INT1P :1;
[; ;pic18f452.h: 2532: unsigned INT2P :1;
[; ;pic18f452.h: 2533: };
[; ;pic18f452.h: 2534: } INTCON3bits @ 0xFF0;
[; ;pic18f452.h: 2537: extern volatile unsigned char INTCON2 @ 0xFF1;
"2539
[; ;pic18f452.h: 2539: asm("INTCON2 equ 0FF1h");
[; <" INTCON2 equ 0FF1h ;# ">
[; ;pic18f452.h: 2542: extern volatile union {
[; ;pic18f452.h: 2543: struct {
[; ;pic18f452.h: 2544: unsigned :7;
[; ;pic18f452.h: 2545: unsigned NOT_RBPU :1;
[; ;pic18f452.h: 2546: };
[; ;pic18f452.h: 2547: struct {
[; ;pic18f452.h: 2548: unsigned RBIP :1;
[; ;pic18f452.h: 2549: unsigned :1;
[; ;pic18f452.h: 2550: unsigned TMR0IP :1;
[; ;pic18f452.h: 2551: unsigned :1;
[; ;pic18f452.h: 2552: unsigned INTEDG2 :1;
[; ;pic18f452.h: 2553: unsigned INTEDG1 :1;
[; ;pic18f452.h: 2554: unsigned INTEDG0 :1;
[; ;pic18f452.h: 2555: unsigned nRBPU :1;
[; ;pic18f452.h: 2556: };
[; ;pic18f452.h: 2557: struct {
[; ;pic18f452.h: 2558: unsigned :2;
[; ;pic18f452.h: 2559: unsigned T0IP :1;
[; ;pic18f452.h: 2560: unsigned :4;
[; ;pic18f452.h: 2561: unsigned RBPU :1;
[; ;pic18f452.h: 2562: };
[; ;pic18f452.h: 2563: } INTCON2bits @ 0xFF1;
[; ;pic18f452.h: 2566: extern volatile unsigned char INTCON @ 0xFF2;
"2568
[; ;pic18f452.h: 2568: asm("INTCON equ 0FF2h");
[; <" INTCON equ 0FF2h ;# ">
[; ;pic18f452.h: 2571: extern volatile unsigned char INTCON1 @ 0xFF2;
"2573
[; ;pic18f452.h: 2573: asm("INTCON1 equ 0FF2h");
[; <" INTCON1 equ 0FF2h ;# ">
[; ;pic18f452.h: 2576: extern volatile union {
[; ;pic18f452.h: 2577: struct {
[; ;pic18f452.h: 2578: unsigned RBIF :1;
[; ;pic18f452.h: 2579: unsigned INT0IF :1;
[; ;pic18f452.h: 2580: unsigned TMR0IF :1;
[; ;pic18f452.h: 2581: unsigned RBIE :1;
[; ;pic18f452.h: 2582: unsigned INT0IE :1;
[; ;pic18f452.h: 2583: unsigned TMR0IE :1;
[; ;pic18f452.h: 2584: unsigned PEIE_GIEL :1;
[; ;pic18f452.h: 2585: unsigned GIE_GIEH :1;
[; ;pic18f452.h: 2586: };
[; ;pic18f452.h: 2587: struct {
[; ;pic18f452.h: 2588: unsigned RBIF :1;
[; ;pic18f452.h: 2589: unsigned INT0IF :1;
[; ;pic18f452.h: 2590: unsigned TMR0IF :1;
[; ;pic18f452.h: 2591: unsigned RBIE :1;
[; ;pic18f452.h: 2592: unsigned INT0IE :1;
[; ;pic18f452.h: 2593: unsigned TMR0IE :1;
[; ;pic18f452.h: 2594: unsigned PEIE :1;
[; ;pic18f452.h: 2595: unsigned GIE :1;
[; ;pic18f452.h: 2596: };
[; ;pic18f452.h: 2597: struct {
[; ;pic18f452.h: 2598: unsigned RBIF :1;
[; ;pic18f452.h: 2599: unsigned INT0IF :1;
[; ;pic18f452.h: 2600: unsigned TMR0IF :1;
[; ;pic18f452.h: 2601: unsigned RBIE :1;
[; ;pic18f452.h: 2602: unsigned INT0IE :1;
[; ;pic18f452.h: 2603: unsigned TMR0IE :1;
[; ;pic18f452.h: 2604: unsigned GIEL :1;
[; ;pic18f452.h: 2605: unsigned GIEH :1;
[; ;pic18f452.h: 2606: };
[; ;pic18f452.h: 2607: struct {
[; ;pic18f452.h: 2608: unsigned RBIF :1;
[; ;pic18f452.h: 2609: unsigned INT0IF :1;
[; ;pic18f452.h: 2610: unsigned TMR0IF :1;
[; ;pic18f452.h: 2611: unsigned RBIE :1;
[; ;pic18f452.h: 2612: unsigned INT0IE :1;
[; ;pic18f452.h: 2613: unsigned TMR0IE :1;
[; ;pic18f452.h: 2614: unsigned PEIE_GIEL :1;
[; ;pic18f452.h: 2615: unsigned GIE_GIEH :1;
[; ;pic18f452.h: 2616: };
[; ;pic18f452.h: 2617: struct {
[; ;pic18f452.h: 2618: unsigned :1;
[; ;pic18f452.h: 2619: unsigned INT0F :1;
[; ;pic18f452.h: 2620: unsigned T0IF :1;
[; ;pic18f452.h: 2621: unsigned :1;
[; ;pic18f452.h: 2622: unsigned INT0E :1;
[; ;pic18f452.h: 2623: unsigned T0IE :1;
[; ;pic18f452.h: 2624: unsigned PEIE :1;
[; ;pic18f452.h: 2625: unsigned GIE :1;
[; ;pic18f452.h: 2626: };
[; ;pic18f452.h: 2627: struct {
[; ;pic18f452.h: 2628: unsigned :6;
[; ;pic18f452.h: 2629: unsigned GIEL :1;
[; ;pic18f452.h: 2630: unsigned GIEH :1;
[; ;pic18f452.h: 2631: };
[; ;pic18f452.h: 2632: } INTCONbits @ 0xFF2;
[; ;pic18f452.h: 2634: extern volatile union {
[; ;pic18f452.h: 2635: struct {
[; ;pic18f452.h: 2636: unsigned RBIF :1;
[; ;pic18f452.h: 2637: unsigned INT0IF :1;
[; ;pic18f452.h: 2638: unsigned TMR0IF :1;
[; ;pic18f452.h: 2639: unsigned RBIE :1;
[; ;pic18f452.h: 2640: unsigned INT0IE :1;
[; ;pic18f452.h: 2641: unsigned TMR0IE :1;
[; ;pic18f452.h: 2642: unsigned PEIE_GIEL :1;
[; ;pic18f452.h: 2643: unsigned GIE_GIEH :1;
[; ;pic18f452.h: 2644: };
[; ;pic18f452.h: 2645: struct {
[; ;pic18f452.h: 2646: unsigned RBIF :1;
[; ;pic18f452.h: 2647: unsigned INT0IF :1;
[; ;pic18f452.h: 2648: unsigned TMR0IF :1;
[; ;pic18f452.h: 2649: unsigned RBIE :1;
[; ;pic18f452.h: 2650: unsigned INT0IE :1;
[; ;pic18f452.h: 2651: unsigned TMR0IE :1;
[; ;pic18f452.h: 2652: unsigned PEIE :1;
[; ;pic18f452.h: 2653: unsigned GIE :1;
[; ;pic18f452.h: 2654: };
[; ;pic18f452.h: 2655: struct {
[; ;pic18f452.h: 2656: unsigned RBIF :1;
[; ;pic18f452.h: 2657: unsigned INT0IF :1;
[; ;pic18f452.h: 2658: unsigned TMR0IF :1;
[; ;pic18f452.h: 2659: unsigned RBIE :1;
[; ;pic18f452.h: 2660: unsigned INT0IE :1;
[; ;pic18f452.h: 2661: unsigned TMR0IE :1;
[; ;pic18f452.h: 2662: unsigned GIEL :1;
[; ;pic18f452.h: 2663: unsigned GIEH :1;
[; ;pic18f452.h: 2664: };
[; ;pic18f452.h: 2665: struct {
[; ;pic18f452.h: 2666: unsigned RBIF :1;
[; ;pic18f452.h: 2667: unsigned INT0IF :1;
[; ;pic18f452.h: 2668: unsigned TMR0IF :1;
[; ;pic18f452.h: 2669: unsigned RBIE :1;
[; ;pic18f452.h: 2670: unsigned INT0IE :1;
[; ;pic18f452.h: 2671: unsigned TMR0IE :1;
[; ;pic18f452.h: 2672: unsigned PEIE_GIEL :1;
[; ;pic18f452.h: 2673: unsigned GIE_GIEH :1;
[; ;pic18f452.h: 2674: };
[; ;pic18f452.h: 2675: struct {
[; ;pic18f452.h: 2676: unsigned :1;
[; ;pic18f452.h: 2677: unsigned INT0F :1;
[; ;pic18f452.h: 2678: unsigned T0IF :1;
[; ;pic18f452.h: 2679: unsigned :1;
[; ;pic18f452.h: 2680: unsigned INT0E :1;
[; ;pic18f452.h: 2681: unsigned T0IE :1;
[; ;pic18f452.h: 2682: unsigned PEIE :1;
[; ;pic18f452.h: 2683: unsigned GIE :1;
[; ;pic18f452.h: 2684: };
[; ;pic18f452.h: 2685: struct {
[; ;pic18f452.h: 2686: unsigned :6;
[; ;pic18f452.h: 2687: unsigned GIEL :1;
[; ;pic18f452.h: 2688: unsigned GIEH :1;
[; ;pic18f452.h: 2689: };
[; ;pic18f452.h: 2690: } INTCON1bits @ 0xFF2;
[; ;pic18f452.h: 2693: extern volatile unsigned short PROD @ 0xFF3;
"2695
[; ;pic18f452.h: 2695: asm("PROD equ 0FF3h");
[; <" PROD equ 0FF3h ;# ">
[; ;pic18f452.h: 2698: extern volatile union {
[; ;pic18f452.h: 2699: struct {
[; ;pic18f452.h: 2700: unsigned PROD :16;
[; ;pic18f452.h: 2701: };
[; ;pic18f452.h: 2702: } PRODbits @ 0xFF3;
[; ;pic18f452.h: 2705: extern volatile unsigned char PRODL @ 0xFF3;
"2707
[; ;pic18f452.h: 2707: asm("PRODL equ 0FF3h");
[; <" PRODL equ 0FF3h ;# ">
[; ;pic18f452.h: 2710: extern volatile union {
[; ;pic18f452.h: 2711: struct {
[; ;pic18f452.h: 2712: unsigned PRODL :8;
[; ;pic18f452.h: 2713: };
[; ;pic18f452.h: 2714: } PRODLbits @ 0xFF3;
[; ;pic18f452.h: 2717: extern volatile unsigned char PRODH @ 0xFF4;
"2719
[; ;pic18f452.h: 2719: asm("PRODH equ 0FF4h");
[; <" PRODH equ 0FF4h ;# ">
[; ;pic18f452.h: 2722: extern volatile union {
[; ;pic18f452.h: 2723: struct {
[; ;pic18f452.h: 2724: unsigned PRODH :8;
[; ;pic18f452.h: 2725: };
[; ;pic18f452.h: 2726: } PRODHbits @ 0xFF4;
[; ;pic18f452.h: 2729: extern volatile unsigned char TABLAT @ 0xFF5;
"2731
[; ;pic18f452.h: 2731: asm("TABLAT equ 0FF5h");
[; <" TABLAT equ 0FF5h ;# ">
[; ;pic18f452.h: 2734: extern volatile union {
[; ;pic18f452.h: 2735: struct {
[; ;pic18f452.h: 2736: unsigned TABLAT :8;
[; ;pic18f452.h: 2737: };
[; ;pic18f452.h: 2738: } TABLATbits @ 0xFF5;
[; ;pic18f452.h: 2741: extern volatile unsigned short long TBLPTR @ 0xFF6;
"2743
[; ;pic18f452.h: 2743: asm("TBLPTR equ 0FF6h");
[; <" TBLPTR equ 0FF6h ;# ">
[; ;pic18f452.h: 2746: extern volatile union {
[; ;pic18f452.h: 2747: struct {
[; ;pic18f452.h: 2748: unsigned TBLPTR :21;
[; ;pic18f452.h: 2749: unsigned ACSS :1;
[; ;pic18f452.h: 2750: };
[; ;pic18f452.h: 2751: } TBLPTRbits @ 0xFF6;
[; ;pic18f452.h: 2754: extern volatile unsigned char TBLPTRL @ 0xFF6;
"2756
[; ;pic18f452.h: 2756: asm("TBLPTRL equ 0FF6h");
[; <" TBLPTRL equ 0FF6h ;# ">
[; ;pic18f452.h: 2759: extern volatile union {
[; ;pic18f452.h: 2760: struct {
[; ;pic18f452.h: 2761: unsigned TBLPTRL :8;
[; ;pic18f452.h: 2762: };
[; ;pic18f452.h: 2763: } TBLPTRLbits @ 0xFF6;
[; ;pic18f452.h: 2766: extern volatile unsigned char TBLPTRH @ 0xFF7;
"2768
[; ;pic18f452.h: 2768: asm("TBLPTRH equ 0FF7h");
[; <" TBLPTRH equ 0FF7h ;# ">
[; ;pic18f452.h: 2771: extern volatile union {
[; ;pic18f452.h: 2772: struct {
[; ;pic18f452.h: 2773: unsigned TBLPTRH :8;
[; ;pic18f452.h: 2774: };
[; ;pic18f452.h: 2775: } TBLPTRHbits @ 0xFF7;
[; ;pic18f452.h: 2778: extern volatile unsigned char TBLPTRU @ 0xFF8;
"2780
[; ;pic18f452.h: 2780: asm("TBLPTRU equ 0FF8h");
[; <" TBLPTRU equ 0FF8h ;# ">
[; ;pic18f452.h: 2783: extern volatile union {
[; ;pic18f452.h: 2784: struct {
[; ;pic18f452.h: 2785: unsigned TBLPTRU :5;
[; ;pic18f452.h: 2786: unsigned ACSS :1;
[; ;pic18f452.h: 2787: };
[; ;pic18f452.h: 2788: } TBLPTRUbits @ 0xFF8;
[; ;pic18f452.h: 2791: extern volatile unsigned short long PCLAT @ 0xFF9;
"2793
[; ;pic18f452.h: 2793: asm("PCLAT equ 0FF9h");
[; <" PCLAT equ 0FF9h ;# ">
[; ;pic18f452.h: 2796: extern volatile unsigned short long PC @ 0xFF9;
"2798
[; ;pic18f452.h: 2798: asm("PC equ 0FF9h");
[; <" PC equ 0FF9h ;# ">
[; ;pic18f452.h: 2801: extern volatile union {
[; ;pic18f452.h: 2802: struct {
[; ;pic18f452.h: 2803: unsigned PCLAT :21;
[; ;pic18f452.h: 2804: };
[; ;pic18f452.h: 2805: } PCLATbits @ 0xFF9;
[; ;pic18f452.h: 2807: extern volatile union {
[; ;pic18f452.h: 2808: struct {
[; ;pic18f452.h: 2809: unsigned PCLAT :21;
[; ;pic18f452.h: 2810: };
[; ;pic18f452.h: 2811: } PCbits @ 0xFF9;
[; ;pic18f452.h: 2814: extern volatile unsigned char PCL @ 0xFF9;
"2816
[; ;pic18f452.h: 2816: asm("PCL equ 0FF9h");
[; <" PCL equ 0FF9h ;# ">
[; ;pic18f452.h: 2819: extern volatile union {
[; ;pic18f452.h: 2820: struct {
[; ;pic18f452.h: 2821: unsigned PCL :8;
[; ;pic18f452.h: 2822: };
[; ;pic18f452.h: 2823: } PCLbits @ 0xFF9;
[; ;pic18f452.h: 2826: extern volatile unsigned char PCLATH @ 0xFFA;
"2828
[; ;pic18f452.h: 2828: asm("PCLATH equ 0FFAh");
[; <" PCLATH equ 0FFAh ;# ">
[; ;pic18f452.h: 2831: extern volatile union {
[; ;pic18f452.h: 2832: struct {
[; ;pic18f452.h: 2833: unsigned PCH :8;
[; ;pic18f452.h: 2834: };
[; ;pic18f452.h: 2835: } PCLATHbits @ 0xFFA;
[; ;pic18f452.h: 2838: extern volatile unsigned char PCLATU @ 0xFFB;
"2840
[; ;pic18f452.h: 2840: asm("PCLATU equ 0FFBh");
[; <" PCLATU equ 0FFBh ;# ">
[; ;pic18f452.h: 2843: extern volatile union {
[; ;pic18f452.h: 2844: struct {
[; ;pic18f452.h: 2845: unsigned PCU :5;
[; ;pic18f452.h: 2846: };
[; ;pic18f452.h: 2847: } PCLATUbits @ 0xFFB;
[; ;pic18f452.h: 2850: extern volatile unsigned char STKPTR @ 0xFFC;
"2852
[; ;pic18f452.h: 2852: asm("STKPTR equ 0FFCh");
[; <" STKPTR equ 0FFCh ;# ">
[; ;pic18f452.h: 2855: extern volatile union {
[; ;pic18f452.h: 2856: struct {
[; ;pic18f452.h: 2857: unsigned STKPTR :5;
[; ;pic18f452.h: 2858: unsigned :1;
[; ;pic18f452.h: 2859: unsigned STKUNF :1;
[; ;pic18f452.h: 2860: unsigned STKFUL :1;
[; ;pic18f452.h: 2861: };
[; ;pic18f452.h: 2862: struct {
[; ;pic18f452.h: 2863: unsigned STKPTR0 :1;
[; ;pic18f452.h: 2864: unsigned STKPTR1 :1;
[; ;pic18f452.h: 2865: unsigned STKPTR2 :1;
[; ;pic18f452.h: 2866: unsigned STKPTR3 :1;
[; ;pic18f452.h: 2867: unsigned STKPTR4 :1;
[; ;pic18f452.h: 2868: unsigned :2;
[; ;pic18f452.h: 2869: unsigned STKOVF :1;
[; ;pic18f452.h: 2870: };
[; ;pic18f452.h: 2871: struct {
[; ;pic18f452.h: 2872: unsigned SP0 :1;
[; ;pic18f452.h: 2873: unsigned SP1 :1;
[; ;pic18f452.h: 2874: unsigned SP2 :1;
[; ;pic18f452.h: 2875: unsigned SP3 :1;
[; ;pic18f452.h: 2876: unsigned SP4 :1;
[; ;pic18f452.h: 2877: };
[; ;pic18f452.h: 2878: } STKPTRbits @ 0xFFC;
[; ;pic18f452.h: 2881: extern volatile unsigned short long TOS @ 0xFFD;
"2883
[; ;pic18f452.h: 2883: asm("TOS equ 0FFDh");
[; <" TOS equ 0FFDh ;# ">
[; ;pic18f452.h: 2886: extern volatile union {
[; ;pic18f452.h: 2887: struct {
[; ;pic18f452.h: 2888: unsigned TOS :21;
[; ;pic18f452.h: 2889: };
[; ;pic18f452.h: 2890: } TOSbits @ 0xFFD;
[; ;pic18f452.h: 2893: extern volatile unsigned char TOSL @ 0xFFD;
"2895
[; ;pic18f452.h: 2895: asm("TOSL equ 0FFDh");
[; <" TOSL equ 0FFDh ;# ">
[; ;pic18f452.h: 2898: extern volatile union {
[; ;pic18f452.h: 2899: struct {
[; ;pic18f452.h: 2900: unsigned TOSL :8;
[; ;pic18f452.h: 2901: };
[; ;pic18f452.h: 2902: } TOSLbits @ 0xFFD;
[; ;pic18f452.h: 2905: extern volatile unsigned char TOSH @ 0xFFE;
"2907
[; ;pic18f452.h: 2907: asm("TOSH equ 0FFEh");
[; <" TOSH equ 0FFEh ;# ">
[; ;pic18f452.h: 2910: extern volatile union {
[; ;pic18f452.h: 2911: struct {
[; ;pic18f452.h: 2912: unsigned TOSH :8;
[; ;pic18f452.h: 2913: };
[; ;pic18f452.h: 2914: } TOSHbits @ 0xFFE;
[; ;pic18f452.h: 2917: extern volatile unsigned char TOSU @ 0xFFF;
"2919
[; ;pic18f452.h: 2919: asm("TOSU equ 0FFFh");
[; <" TOSU equ 0FFFh ;# ">
[; ;pic18f452.h: 2922: extern volatile union {
[; ;pic18f452.h: 2923: struct {
[; ;pic18f452.h: 2924: unsigned TOSU :5;
[; ;pic18f452.h: 2925: };
[; ;pic18f452.h: 2926: } TOSUbits @ 0xFFF;
[; ;pic18f452.h: 2932: extern volatile bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;
[; ;pic18f452.h: 2934: extern volatile bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;
[; ;pic18f452.h: 2936: extern volatile bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;
[; ;pic18f452.h: 2938: extern volatile bit ADCAL @ (((unsigned) &ADCON0)*8) + 7;
[; ;pic18f452.h: 2940: extern volatile bit ADCS0 @ (((unsigned) &ADCON0)*8) + 6;
[; ;pic18f452.h: 2942: extern volatile bit ADCS1 @ (((unsigned) &ADCON0)*8) + 7;
[; ;pic18f452.h: 2944: extern volatile bit ADCS2 @ (((unsigned) &ADCON1)*8) + 6;
[; ;pic18f452.h: 2946: extern volatile bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
[; ;pic18f452.h: 2948: extern volatile bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
[; ;pic18f452.h: 2950: extern volatile bit ADIE @ (((unsigned) &PIE1)*8) + 6;
[; ;pic18f452.h: 2952: extern volatile bit ADIF @ (((unsigned) &PIR1)*8) + 6;
[; ;pic18f452.h: 2954: extern volatile bit ADIP @ (((unsigned) &IPR1)*8) + 6;
[; ;pic18f452.h: 2956: extern volatile bit ADON @ (((unsigned) &ADCON0)*8) + 0;
[; ;pic18f452.h: 2958: extern volatile bit AN0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f452.h: 2960: extern volatile bit AN1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f452.h: 2962: extern volatile bit AN2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f452.h: 2964: extern volatile bit AN3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f452.h: 2966: extern volatile bit AN4 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f452.h: 2968: extern volatile bit AN5 @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f452.h: 2970: extern volatile bit AN6 @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f452.h: 2972: extern volatile bit AN7 @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f452.h: 2974: extern volatile bit BCLIE @ (((unsigned) &PIE2)*8) + 3;
[; ;pic18f452.h: 2976: extern volatile bit BCLIF @ (((unsigned) &PIR2)*8) + 3;
[; ;pic18f452.h: 2978: extern volatile bit BCLIP @ (((unsigned) &IPR2)*8) + 3;
[; ;pic18f452.h: 2980: extern volatile bit BF @ (((unsigned) &SSPSTAT)*8) + 0;
[; ;pic18f452.h: 2982: extern volatile bit BOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f452.h: 2984: extern volatile bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
[; ;pic18f452.h: 2986: extern volatile bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;
[; ;pic18f452.h: 2988: extern volatile bit CARRY @ (((unsigned) &STATUS)*8) + 0;
[; ;pic18f452.h: 2990: extern volatile bit CCP1 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f452.h: 2992: extern volatile bit CCP10 @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f452.h: 2994: extern volatile bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
[; ;pic18f452.h: 2996: extern volatile bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
[; ;pic18f452.h: 2998: extern volatile bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;
[; ;pic18f452.h: 3000: extern volatile bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
[; ;pic18f452.h: 3002: extern volatile bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
[; ;pic18f452.h: 3004: extern volatile bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
[; ;pic18f452.h: 3006: extern volatile bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
[; ;pic18f452.h: 3008: extern volatile bit CCP1X @ (((unsigned) &CCP1CON)*8) + 5;
[; ;pic18f452.h: 3010: extern volatile bit CCP1Y @ (((unsigned) &CCP1CON)*8) + 4;
[; ;pic18f452.h: 3012: extern volatile bit CCP2A @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f452.h: 3014: extern volatile bit CCP2E @ (((unsigned) &PORTE)*8) + 7;
[; ;pic18f452.h: 3016: extern volatile bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;
[; ;pic18f452.h: 3018: extern volatile bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;
[; ;pic18f452.h: 3020: extern volatile bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;
[; ;pic18f452.h: 3022: extern volatile bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;
[; ;pic18f452.h: 3024: extern volatile bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;
[; ;pic18f452.h: 3026: extern volatile bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;
[; ;pic18f452.h: 3028: extern volatile bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;
[; ;pic18f452.h: 3030: extern volatile bit CCP2X @ (((unsigned) &CCP2CON)*8) + 5;
[; ;pic18f452.h: 3032: extern volatile bit CCP2Y @ (((unsigned) &CCP2CON)*8) + 4;
[; ;pic18f452.h: 3034: extern volatile bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f452.h: 3036: extern volatile bit CCP6E @ (((unsigned) &PORTE)*8) + 6;
[; ;pic18f452.h: 3038: extern volatile bit CCP7E @ (((unsigned) &PORTE)*8) + 5;
[; ;pic18f452.h: 3040: extern volatile bit CCP8E @ (((unsigned) &PORTE)*8) + 4;
[; ;pic18f452.h: 3042: extern volatile bit CCP9E @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f452.h: 3044: extern volatile bit CFGS @ (((unsigned) &EECON1)*8) + 6;
[; ;pic18f452.h: 3046: extern volatile bit CHS0 @ (((unsigned) &ADCON0)*8) + 3;
[; ;pic18f452.h: 3048: extern volatile bit CHS1 @ (((unsigned) &ADCON0)*8) + 4;
[; ;pic18f452.h: 3050: extern volatile bit CHS2 @ (((unsigned) &ADCON0)*8) + 5;
[; ;pic18f452.h: 3052: extern volatile bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;
[; ;pic18f452.h: 3054: extern volatile bit CK @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f452.h: 3056: extern volatile bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;
[; ;pic18f452.h: 3058: extern volatile bit CKP @ (((unsigned) &SSPCON1)*8) + 4;
[; ;pic18f452.h: 3060: extern volatile bit CLKO @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f452.h: 3062: extern volatile bit CREN @ (((unsigned) &RCSTA)*8) + 4;
[; ;pic18f452.h: 3064: extern volatile bit CS @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f452.h: 3066: extern volatile bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
[; ;pic18f452.h: 3068: extern volatile bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;
[; ;pic18f452.h: 3070: extern volatile bit DA @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3072: extern volatile bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3074: extern volatile bit DC @ (((unsigned) &STATUS)*8) + 1;
[; ;pic18f452.h: 3076: extern volatile bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
[; ;pic18f452.h: 3078: extern volatile bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
[; ;pic18f452.h: 3080: extern volatile bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;
[; ;pic18f452.h: 3082: extern volatile bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;
[; ;pic18f452.h: 3084: extern volatile bit DCCPX @ (((unsigned) &CCP2CON)*8) + 5;
[; ;pic18f452.h: 3086: extern volatile bit DONE @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f452.h: 3088: extern volatile bit DT @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f452.h: 3090: extern volatile bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3092: extern volatile bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3094: extern volatile bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3096: extern volatile bit EEFS @ (((unsigned) &EECON1)*8) + 6;
[; ;pic18f452.h: 3098: extern volatile bit EEIE @ (((unsigned) &PIE2)*8) + 4;
[; ;pic18f452.h: 3100: extern volatile bit EEIF @ (((unsigned) &PIR2)*8) + 4;
[; ;pic18f452.h: 3102: extern volatile bit EEIP @ (((unsigned) &IPR2)*8) + 4;
[; ;pic18f452.h: 3104: extern volatile bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
[; ;pic18f452.h: 3106: extern volatile bit FERR @ (((unsigned) &RCSTA)*8) + 2;
[; ;pic18f452.h: 3108: extern volatile bit FREE @ (((unsigned) &EECON1)*8) + 4;
[; ;pic18f452.h: 3110: extern volatile bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;
[; ;pic18f452.h: 3112: extern volatile bit GIE @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f452.h: 3114: extern volatile bit GIEH @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f452.h: 3116: extern volatile bit GIEL @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f452.h: 3118: extern volatile bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f452.h: 3120: extern volatile bit GO @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f452.h: 3122: extern volatile bit GODONE @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f452.h: 3124: extern volatile bit GO_DONE @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f452.h: 3126: extern volatile bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f452.h: 3128: extern volatile bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f452.h: 3130: extern volatile bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3132: extern volatile bit I2C_DATA @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3134: extern volatile bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f452.h: 3136: extern volatile bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;
[; ;pic18f452.h: 3138: extern volatile bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;
[; ;pic18f452.h: 3140: extern volatile bit IBF @ (((unsigned) &TRISE)*8) + 7;
[; ;pic18f452.h: 3142: extern volatile bit IBOV @ (((unsigned) &TRISE)*8) + 5;
[; ;pic18f452.h: 3144: extern volatile bit INT0 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f452.h: 3146: extern volatile bit INT0E @ (((unsigned) &INTCON)*8) + 4;
[; ;pic18f452.h: 3148: extern volatile bit INT0F @ (((unsigned) &INTCON)*8) + 1;
[; ;pic18f452.h: 3150: extern volatile bit INT0IE @ (((unsigned) &INTCON)*8) + 4;
[; ;pic18f452.h: 3152: extern volatile bit INT0IF @ (((unsigned) &INTCON)*8) + 1;
[; ;pic18f452.h: 3154: extern volatile bit INT1 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f452.h: 3156: extern volatile bit INT1E @ (((unsigned) &INTCON3)*8) + 3;
[; ;pic18f452.h: 3158: extern volatile bit INT1F @ (((unsigned) &INTCON3)*8) + 0;
[; ;pic18f452.h: 3160: extern volatile bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;
[; ;pic18f452.h: 3162: extern volatile bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;
[; ;pic18f452.h: 3164: extern volatile bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;
[; ;pic18f452.h: 3166: extern volatile bit INT1P @ (((unsigned) &INTCON3)*8) + 6;
[; ;pic18f452.h: 3168: extern volatile bit INT2 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f452.h: 3170: extern volatile bit INT2E @ (((unsigned) &INTCON3)*8) + 4;
[; ;pic18f452.h: 3172: extern volatile bit INT2F @ (((unsigned) &INTCON3)*8) + 1;
[; ;pic18f452.h: 3174: extern volatile bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;
[; ;pic18f452.h: 3176: extern volatile bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;
[; ;pic18f452.h: 3178: extern volatile bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;
[; ;pic18f452.h: 3180: extern volatile bit INT2P @ (((unsigned) &INTCON3)*8) + 7;
[; ;pic18f452.h: 3182: extern volatile bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;
[; ;pic18f452.h: 3184: extern volatile bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;
[; ;pic18f452.h: 3186: extern volatile bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;
[; ;pic18f452.h: 3188: extern volatile bit IPEN @ (((unsigned) &RCON)*8) + 7;
[; ;pic18f452.h: 3190: extern volatile bit IRVST @ (((unsigned) &LVDCON)*8) + 5;
[; ;pic18f452.h: 3192: extern volatile bit LA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic18f452.h: 3194: extern volatile bit LA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic18f452.h: 3196: extern volatile bit LA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic18f452.h: 3198: extern volatile bit LA3 @ (((unsigned) &LATA)*8) + 3;
[; ;pic18f452.h: 3200: extern volatile bit LA4 @ (((unsigned) &LATA)*8) + 4;
[; ;pic18f452.h: 3202: extern volatile bit LA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic18f452.h: 3204: extern volatile bit LA6 @ (((unsigned) &LATA)*8) + 6;
[; ;pic18f452.h: 3206: extern volatile bit LA7 @ (((unsigned) &LATA)*8) + 7;
[; ;pic18f452.h: 3208: extern volatile bit LATA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic18f452.h: 3210: extern volatile bit LATA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic18f452.h: 3212: extern volatile bit LATA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic18f452.h: 3214: extern volatile bit LATA3 @ (((unsigned) &LATA)*8) + 3;
[; ;pic18f452.h: 3216: extern volatile bit LATA4 @ (((unsigned) &LATA)*8) + 4;
[; ;pic18f452.h: 3218: extern volatile bit LATA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic18f452.h: 3220: extern volatile bit LATA6 @ (((unsigned) &LATA)*8) + 6;
[; ;pic18f452.h: 3222: extern volatile bit LATA7 @ (((unsigned) &LATA)*8) + 7;
[; ;pic18f452.h: 3224: extern volatile bit LATB0 @ (((unsigned) &LATB)*8) + 0;
[; ;pic18f452.h: 3226: extern volatile bit LATB1 @ (((unsigned) &LATB)*8) + 1;
[; ;pic18f452.h: 3228: extern volatile bit LATB2 @ (((unsigned) &LATB)*8) + 2;
[; ;pic18f452.h: 3230: extern volatile bit LATB3 @ (((unsigned) &LATB)*8) + 3;
[; ;pic18f452.h: 3232: extern volatile bit LATB4 @ (((unsigned) &LATB)*8) + 4;
[; ;pic18f452.h: 3234: extern volatile bit LATB5 @ (((unsigned) &LATB)*8) + 5;
[; ;pic18f452.h: 3236: extern volatile bit LATB6 @ (((unsigned) &LATB)*8) + 6;
[; ;pic18f452.h: 3238: extern volatile bit LATB7 @ (((unsigned) &LATB)*8) + 7;
[; ;pic18f452.h: 3240: extern volatile bit LATC0 @ (((unsigned) &LATC)*8) + 0;
[; ;pic18f452.h: 3242: extern volatile bit LATC1 @ (((unsigned) &LATC)*8) + 1;
[; ;pic18f452.h: 3244: extern volatile bit LATC2 @ (((unsigned) &LATC)*8) + 2;
[; ;pic18f452.h: 3246: extern volatile bit LATC3 @ (((unsigned) &LATC)*8) + 3;
[; ;pic18f452.h: 3248: extern volatile bit LATC4 @ (((unsigned) &LATC)*8) + 4;
[; ;pic18f452.h: 3250: extern volatile bit LATC5 @ (((unsigned) &LATC)*8) + 5;
[; ;pic18f452.h: 3252: extern volatile bit LATC6 @ (((unsigned) &LATC)*8) + 6;
[; ;pic18f452.h: 3254: extern volatile bit LATC7 @ (((unsigned) &LATC)*8) + 7;
[; ;pic18f452.h: 3256: extern volatile bit LATD0 @ (((unsigned) &LATD)*8) + 0;
[; ;pic18f452.h: 3258: extern volatile bit LATD1 @ (((unsigned) &LATD)*8) + 1;
[; ;pic18f452.h: 3260: extern volatile bit LATD2 @ (((unsigned) &LATD)*8) + 2;
[; ;pic18f452.h: 3262: extern volatile bit LATD3 @ (((unsigned) &LATD)*8) + 3;
[; ;pic18f452.h: 3264: extern volatile bit LATD4 @ (((unsigned) &LATD)*8) + 4;
[; ;pic18f452.h: 3266: extern volatile bit LATD5 @ (((unsigned) &LATD)*8) + 5;
[; ;pic18f452.h: 3268: extern volatile bit LATD6 @ (((unsigned) &LATD)*8) + 6;
[; ;pic18f452.h: 3270: extern volatile bit LATD7 @ (((unsigned) &LATD)*8) + 7;
[; ;pic18f452.h: 3272: extern volatile bit LATE0 @ (((unsigned) &LATE)*8) + 0;
[; ;pic18f452.h: 3274: extern volatile bit LATE1 @ (((unsigned) &LATE)*8) + 1;
[; ;pic18f452.h: 3276: extern volatile bit LATE2 @ (((unsigned) &LATE)*8) + 2;
[; ;pic18f452.h: 3278: extern volatile bit LB0 @ (((unsigned) &LATB)*8) + 0;
[; ;pic18f452.h: 3280: extern volatile bit LB1 @ (((unsigned) &LATB)*8) + 1;
[; ;pic18f452.h: 3282: extern volatile bit LB2 @ (((unsigned) &LATB)*8) + 2;
[; ;pic18f452.h: 3284: extern volatile bit LB3 @ (((unsigned) &LATB)*8) + 3;
[; ;pic18f452.h: 3286: extern volatile bit LB4 @ (((unsigned) &LATB)*8) + 4;
[; ;pic18f452.h: 3288: extern volatile bit LB5 @ (((unsigned) &LATB)*8) + 5;
[; ;pic18f452.h: 3290: extern volatile bit LB6 @ (((unsigned) &LATB)*8) + 6;
[; ;pic18f452.h: 3292: extern volatile bit LB7 @ (((unsigned) &LATB)*8) + 7;
[; ;pic18f452.h: 3294: extern volatile bit LC0 @ (((unsigned) &LATC)*8) + 0;
[; ;pic18f452.h: 3296: extern volatile bit LC1 @ (((unsigned) &LATC)*8) + 1;
[; ;pic18f452.h: 3298: extern volatile bit LC2 @ (((unsigned) &LATC)*8) + 2;
[; ;pic18f452.h: 3300: extern volatile bit LC3 @ (((unsigned) &LATC)*8) + 3;
[; ;pic18f452.h: 3302: extern volatile bit LC4 @ (((unsigned) &LATC)*8) + 4;
[; ;pic18f452.h: 3304: extern volatile bit LC5 @ (((unsigned) &LATC)*8) + 5;
[; ;pic18f452.h: 3306: extern volatile bit LC6 @ (((unsigned) &LATC)*8) + 6;
[; ;pic18f452.h: 3308: extern volatile bit LC7 @ (((unsigned) &LATC)*8) + 7;
[; ;pic18f452.h: 3310: extern volatile bit LD0 @ (((unsigned) &LATD)*8) + 0;
[; ;pic18f452.h: 3312: extern volatile bit LD1 @ (((unsigned) &LATD)*8) + 1;
[; ;pic18f452.h: 3314: extern volatile bit LD2 @ (((unsigned) &LATD)*8) + 2;
[; ;pic18f452.h: 3316: extern volatile bit LD3 @ (((unsigned) &LATD)*8) + 3;
[; ;pic18f452.h: 3318: extern volatile bit LD4 @ (((unsigned) &LATD)*8) + 4;
[; ;pic18f452.h: 3320: extern volatile bit LD5 @ (((unsigned) &LATD)*8) + 5;
[; ;pic18f452.h: 3322: extern volatile bit LD6 @ (((unsigned) &LATD)*8) + 6;
[; ;pic18f452.h: 3324: extern volatile bit LD7 @ (((unsigned) &LATD)*8) + 7;
[; ;pic18f452.h: 3326: extern volatile bit LE0 @ (((unsigned) &LATE)*8) + 0;
[; ;pic18f452.h: 3328: extern volatile bit LE1 @ (((unsigned) &LATE)*8) + 1;
[; ;pic18f452.h: 3330: extern volatile bit LE2 @ (((unsigned) &LATE)*8) + 2;
[; ;pic18f452.h: 3332: extern volatile bit LE3 @ (((unsigned) &LATE)*8) + 3;
[; ;pic18f452.h: 3334: extern volatile bit LE4 @ (((unsigned) &LATE)*8) + 4;
[; ;pic18f452.h: 3336: extern volatile bit LE5 @ (((unsigned) &LATE)*8) + 5;
[; ;pic18f452.h: 3338: extern volatile bit LE6 @ (((unsigned) &LATE)*8) + 6;
[; ;pic18f452.h: 3340: extern volatile bit LE7 @ (((unsigned) &LATE)*8) + 7;
[; ;pic18f452.h: 3342: extern volatile bit LVDEN @ (((unsigned) &LVDCON)*8) + 4;
[; ;pic18f452.h: 3344: extern volatile bit LVDIE @ (((unsigned) &PIE2)*8) + 2;
[; ;pic18f452.h: 3346: extern volatile bit LVDIF @ (((unsigned) &PIR2)*8) + 2;
[; ;pic18f452.h: 3348: extern volatile bit LVDIN @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f452.h: 3350: extern volatile bit LVDIP @ (((unsigned) &IPR2)*8) + 2;
[; ;pic18f452.h: 3352: extern volatile bit LVDL0 @ (((unsigned) &LVDCON)*8) + 0;
[; ;pic18f452.h: 3354: extern volatile bit LVDL1 @ (((unsigned) &LVDCON)*8) + 1;
[; ;pic18f452.h: 3356: extern volatile bit LVDL2 @ (((unsigned) &LVDCON)*8) + 2;
[; ;pic18f452.h: 3358: extern volatile bit LVDL3 @ (((unsigned) &LVDCON)*8) + 3;
[; ;pic18f452.h: 3360: extern volatile bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;
[; ;pic18f452.h: 3362: extern volatile bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3364: extern volatile bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3366: extern volatile bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f452.h: 3368: extern volatile bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f452.h: 3370: extern volatile bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;
[; ;pic18f452.h: 3372: extern volatile bit NOT_PD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f452.h: 3374: extern volatile bit NOT_POR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f452.h: 3376: extern volatile bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f452.h: 3378: extern volatile bit NOT_RC8 @ (((unsigned) &RCSTA)*8) + 6;
[; ;pic18f452.h: 3380: extern volatile bit NOT_RI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f452.h: 3382: extern volatile bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f452.h: 3384: extern volatile bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f452.h: 3386: extern volatile bit NOT_TO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f452.h: 3388: extern volatile bit NOT_TX8 @ (((unsigned) &TXSTA)*8) + 6;
[; ;pic18f452.h: 3390: extern volatile bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f452.h: 3392: extern volatile bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f452.h: 3394: extern volatile bit OBF @ (((unsigned) &TRISE)*8) + 6;
[; ;pic18f452.h: 3396: extern volatile bit OERR @ (((unsigned) &RCSTA)*8) + 1;
[; ;pic18f452.h: 3398: extern volatile bit OSC2 @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f452.h: 3400: extern volatile bit OV @ (((unsigned) &STATUS)*8) + 3;
[; ;pic18f452.h: 3402: extern volatile bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;
[; ;pic18f452.h: 3404: extern volatile bit PA1 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f452.h: 3406: extern volatile bit PA2 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f452.h: 3408: extern volatile bit PA2E @ (((unsigned) &PORTE)*8) + 7;
[; ;pic18f452.h: 3410: extern volatile bit PB1E @ (((unsigned) &PORTE)*8) + 6;
[; ;pic18f452.h: 3412: extern volatile bit PB2 @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f452.h: 3414: extern volatile bit PB3E @ (((unsigned) &PORTE)*8) + 4;
[; ;pic18f452.h: 3416: extern volatile bit PC1E @ (((unsigned) &PORTE)*8) + 5;
[; ;pic18f452.h: 3418: extern volatile bit PC2 @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f452.h: 3420: extern volatile bit PC3E @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f452.h: 3422: extern volatile bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;
[; ;pic18f452.h: 3424: extern volatile bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;
[; ;pic18f452.h: 3426: extern volatile bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;
[; ;pic18f452.h: 3428: extern volatile bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;
[; ;pic18f452.h: 3430: extern volatile bit PD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f452.h: 3432: extern volatile bit PD2 @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f452.h: 3434: extern volatile bit PEIE @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f452.h: 3436: extern volatile bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f452.h: 3438: extern volatile bit PEN @ (((unsigned) &SSPCON2)*8) + 2;
[; ;pic18f452.h: 3440: extern volatile bit PGC @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f452.h: 3442: extern volatile bit PGD @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f452.h: 3444: extern volatile bit PGM @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f452.h: 3446: extern volatile bit POR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f452.h: 3448: extern volatile bit PSA @ (((unsigned) &T0CON)*8) + 3;
[; ;pic18f452.h: 3450: extern volatile bit PSP0 @ (((unsigned) &PORTD)*8) + 0;
[; ;pic18f452.h: 3452: extern volatile bit PSP1 @ (((unsigned) &PORTD)*8) + 1;
[; ;pic18f452.h: 3454: extern volatile bit PSP2 @ (((unsigned) &PORTD)*8) + 2;
[; ;pic18f452.h: 3456: extern volatile bit PSP3 @ (((unsigned) &PORTD)*8) + 3;
[; ;pic18f452.h: 3458: extern volatile bit PSP4 @ (((unsigned) &PORTD)*8) + 4;
[; ;pic18f452.h: 3460: extern volatile bit PSP5 @ (((unsigned) &PORTD)*8) + 5;
[; ;pic18f452.h: 3462: extern volatile bit PSP6 @ (((unsigned) &PORTD)*8) + 6;
[; ;pic18f452.h: 3464: extern volatile bit PSP7 @ (((unsigned) &PORTD)*8) + 7;
[; ;pic18f452.h: 3466: extern volatile bit PSPIE @ (((unsigned) &PIE1)*8) + 7;
[; ;pic18f452.h: 3468: extern volatile bit PSPIF @ (((unsigned) &PIR1)*8) + 7;
[; ;pic18f452.h: 3470: extern volatile bit PSPIP @ (((unsigned) &IPR1)*8) + 7;
[; ;pic18f452.h: 3472: extern volatile bit PSPMODE @ (((unsigned) &TRISE)*8) + 4;
[; ;pic18f452.h: 3474: extern volatile bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f452.h: 3476: extern volatile bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f452.h: 3478: extern volatile bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f452.h: 3480: extern volatile bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f452.h: 3482: extern volatile bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic18f452.h: 3484: extern volatile bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f452.h: 3486: extern volatile bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f452.h: 3488: extern volatile bit RA7 @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f452.h: 3490: extern volatile bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f452.h: 3492: extern volatile bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f452.h: 3494: extern volatile bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f452.h: 3496: extern volatile bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f452.h: 3498: extern volatile bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f452.h: 3500: extern volatile bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f452.h: 3502: extern volatile bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f452.h: 3504: extern volatile bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f452.h: 3506: extern volatile bit RBIE @ (((unsigned) &INTCON)*8) + 3;
[; ;pic18f452.h: 3508: extern volatile bit RBIF @ (((unsigned) &INTCON)*8) + 0;
[; ;pic18f452.h: 3510: extern volatile bit RBIP @ (((unsigned) &INTCON2)*8) + 0;
[; ;pic18f452.h: 3512: extern volatile bit RBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f452.h: 3514: extern volatile bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f452.h: 3516: extern volatile bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f452.h: 3518: extern volatile bit RC1IE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic18f452.h: 3520: extern volatile bit RC1IF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic18f452.h: 3522: extern volatile bit RC1IP @ (((unsigned) &IPR1)*8) + 5;
[; ;pic18f452.h: 3524: extern volatile bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f452.h: 3526: extern volatile bit __attribute__((__deprecated__)) RC3 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f452.h: 3528: extern volatile bit __attribute__((__deprecated__)) RC4 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f452.h: 3530: extern volatile bit __attribute__((__deprecated__)) RC5 @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f452.h: 3532: extern volatile bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f452.h: 3534: extern volatile bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f452.h: 3536: extern volatile bit RC8_9 @ (((unsigned) &RCSTA)*8) + 6;
[; ;pic18f452.h: 3538: extern volatile bit RC9 @ (((unsigned) &RCSTA)*8) + 6;
[; ;pic18f452.h: 3540: extern volatile bit RCD8 @ (((unsigned) &RCSTA)*8) + 0;
[; ;pic18f452.h: 3542: extern volatile bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;
[; ;pic18f452.h: 3544: extern volatile bit RCIE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic18f452.h: 3546: extern volatile bit RCIF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic18f452.h: 3548: extern volatile bit RCIP @ (((unsigned) &IPR1)*8) + 5;
[; ;pic18f452.h: 3550: extern volatile bit __attribute__((__deprecated__)) RD @ (((unsigned) &EECON1)*8) + 0;
[; ;pic18f452.h: 3552: extern volatile bit __attribute__((__deprecated__)) RD0 @ (((unsigned) &PORTD)*8) + 0;
[; ;pic18f452.h: 3554: extern volatile bit __attribute__((__deprecated__)) RD1 @ (((unsigned) &PORTD)*8) + 1;
[; ;pic18f452.h: 3556: extern volatile bit __attribute__((__deprecated__)) RD16 @ (((unsigned) &T1CON)*8) + 7;
[; ;pic18f452.h: 3558: extern volatile bit RD163 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f452.h: 3560: extern volatile bit __attribute__((__deprecated__)) RD2 @ (((unsigned) &PORTD)*8) + 2;
[; ;pic18f452.h: 3562: extern volatile bit __attribute__((__deprecated__)) RD3 @ (((unsigned) &PORTD)*8) + 3;
[; ;pic18f452.h: 3564: extern volatile bit __attribute__((__deprecated__)) RD4 @ (((unsigned) &PORTD)*8) + 4;
[; ;pic18f452.h: 3566: extern volatile bit __attribute__((__deprecated__)) RD5 @ (((unsigned) &PORTD)*8) + 5;
[; ;pic18f452.h: 3568: extern volatile bit __attribute__((__deprecated__)) RD6 @ (((unsigned) &PORTD)*8) + 6;
[; ;pic18f452.h: 3570: extern volatile bit __attribute__((__deprecated__)) RD7 @ (((unsigned) &PORTD)*8) + 7;
[; ;pic18f452.h: 3572: extern volatile bit RDE @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f452.h: 3574: extern volatile bit __attribute__((__deprecated__)) RE0 @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f452.h: 3576: extern volatile bit __attribute__((__deprecated__)) RE1 @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f452.h: 3578: extern volatile bit __attribute__((__deprecated__)) RE2 @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f452.h: 3580: extern volatile bit RE3 @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f452.h: 3582: extern volatile bit RE4 @ (((unsigned) &PORTE)*8) + 4;
[; ;pic18f452.h: 3584: extern volatile bit RE5 @ (((unsigned) &PORTE)*8) + 5;
[; ;pic18f452.h: 3586: extern volatile bit RE6 @ (((unsigned) &PORTE)*8) + 6;
[; ;pic18f452.h: 3588: extern volatile bit RE7 @ (((unsigned) &PORTE)*8) + 7;
[; ;pic18f452.h: 3590: extern volatile bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f452.h: 3592: extern volatile bit RI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f452.h: 3594: extern volatile bit RJPU @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f452.h: 3596: extern volatile bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;
[; ;pic18f452.h: 3598: extern volatile bit RW @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f452.h: 3600: extern volatile bit RX @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f452.h: 3602: extern volatile bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
[; ;pic18f452.h: 3604: extern volatile bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
[; ;pic18f452.h: 3606: extern volatile bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f452.h: 3608: extern volatile bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f452.h: 3610: extern volatile bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f452.h: 3612: extern volatile bit SCK @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f452.h: 3614: extern volatile bit SCL @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f452.h: 3616: extern volatile bit SCS @ (((unsigned) &OSCCON)*8) + 0;
[; ;pic18f452.h: 3618: extern volatile bit SDA @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f452.h: 3620: extern volatile bit SDI @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f452.h: 3622: extern volatile bit SDO @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f452.h: 3624: extern volatile bit SEN @ (((unsigned) &SSPCON2)*8) + 0;
[; ;pic18f452.h: 3626: extern volatile bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;
[; ;pic18f452.h: 3628: extern volatile bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic18f452.h: 3630: extern volatile bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;
[; ;pic18f452.h: 3632: extern volatile bit SP0 @ (((unsigned) &STKPTR)*8) + 0;
[; ;pic18f452.h: 3634: extern volatile bit SP1 @ (((unsigned) &STKPTR)*8) + 1;
[; ;pic18f452.h: 3636: extern volatile bit SP2 @ (((unsigned) &STKPTR)*8) + 2;
[; ;pic18f452.h: 3638: extern volatile bit SP3 @ (((unsigned) &STKPTR)*8) + 3;
[; ;pic18f452.h: 3640: extern volatile bit SP4 @ (((unsigned) &STKPTR)*8) + 4;
[; ;pic18f452.h: 3642: extern volatile bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
[; ;pic18f452.h: 3644: extern volatile bit SREN @ (((unsigned) &RCSTA)*8) + 5;
[; ;pic18f452.h: 3646: extern volatile bit SRENA @ (((unsigned) &RCSTA)*8) + 5;
[; ;pic18f452.h: 3648: extern volatile bit SS @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f452.h: 3650: extern volatile bit SS2 @ (((unsigned) &PORTD)*8) + 7;
[; ;pic18f452.h: 3652: extern volatile bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;
[; ;pic18f452.h: 3654: extern volatile bit SSPIE @ (((unsigned) &PIE1)*8) + 3;
[; ;pic18f452.h: 3656: extern volatile bit SSPIF @ (((unsigned) &PIR1)*8) + 3;
[; ;pic18f452.h: 3658: extern volatile bit SSPIP @ (((unsigned) &IPR1)*8) + 3;
[; ;pic18f452.h: 3660: extern volatile bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;
[; ;pic18f452.h: 3662: extern volatile bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;
[; ;pic18f452.h: 3664: extern volatile bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;
[; ;pic18f452.h: 3666: extern volatile bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;
[; ;pic18f452.h: 3668: extern volatile bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;
[; ;pic18f452.h: 3670: extern volatile bit START @ (((unsigned) &SSPSTAT)*8) + 3;
[; ;pic18f452.h: 3672: extern volatile bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;
[; ;pic18f452.h: 3674: extern volatile bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;
[; ;pic18f452.h: 3676: extern volatile bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;
[; ;pic18f452.h: 3678: extern volatile bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;
[; ;pic18f452.h: 3680: extern volatile bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;
[; ;pic18f452.h: 3682: extern volatile bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;
[; ;pic18f452.h: 3684: extern volatile bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;
[; ;pic18f452.h: 3686: extern volatile bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;
[; ;pic18f452.h: 3688: extern volatile bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;
[; ;pic18f452.h: 3690: extern volatile bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic18f452.h: 3692: extern volatile bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic18f452.h: 3694: extern volatile bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
[; ;pic18f452.h: 3696: extern volatile bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;
[; ;pic18f452.h: 3698: extern volatile bit T08BIT @ (((unsigned) &T0CON)*8) + 6;
[; ;pic18f452.h: 3700: extern volatile bit T0CKI @ (((unsigned) &PORTA)*8) + 4;
[; ;pic18f452.h: 3702: extern volatile bit T0CS @ (((unsigned) &T0CON)*8) + 5;
[; ;pic18f452.h: 3704: extern volatile bit T0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic18f452.h: 3706: extern volatile bit T0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic18f452.h: 3708: extern volatile bit T0IP @ (((unsigned) &INTCON2)*8) + 2;
[; ;pic18f452.h: 3710: extern volatile bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;
[; ;pic18f452.h: 3712: extern volatile bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;
[; ;pic18f452.h: 3714: extern volatile bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;
[; ;pic18f452.h: 3716: extern volatile bit T0SE @ (((unsigned) &T0CON)*8) + 4;
[; ;pic18f452.h: 3718: extern volatile bit T1CKI @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f452.h: 3720: extern volatile bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
[; ;pic18f452.h: 3722: extern volatile bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
[; ;pic18f452.h: 3724: extern volatile bit T1INSYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f452.h: 3726: extern volatile bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic18f452.h: 3728: extern volatile bit T1OSI @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f452.h: 3730: extern volatile bit T1OSO @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f452.h: 3732: extern volatile bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;
[; ;pic18f452.h: 3734: extern volatile bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f452.h: 3736: extern volatile bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
[; ;pic18f452.h: 3738: extern volatile bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
[; ;pic18f452.h: 3740: extern volatile bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;
[; ;pic18f452.h: 3742: extern volatile bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;
[; ;pic18f452.h: 3744: extern volatile bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;
[; ;pic18f452.h: 3746: extern volatile bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;
[; ;pic18f452.h: 3748: extern volatile bit T3INSYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f452.h: 3750: extern volatile bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f452.h: 3752: extern volatile bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f452.h: 3754: extern volatile bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic18f452.h: 3756: extern volatile bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic18f452.h: 3758: extern volatile bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;
[; ;pic18f452.h: 3760: extern volatile bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;
[; ;pic18f452.h: 3762: extern volatile bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;
[; ;pic18f452.h: 3764: extern volatile bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
[; ;pic18f452.h: 3766: extern volatile bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
[; ;pic18f452.h: 3768: extern volatile bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;
[; ;pic18f452.h: 3770: extern volatile bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
[; ;pic18f452.h: 3772: extern volatile bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
[; ;pic18f452.h: 3774: extern volatile bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
[; ;pic18f452.h: 3776: extern volatile bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;
[; ;pic18f452.h: 3778: extern volatile bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
[; ;pic18f452.h: 3780: extern volatile bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;
[; ;pic18f452.h: 3782: extern volatile bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;
[; ;pic18f452.h: 3784: extern volatile bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;
[; ;pic18f452.h: 3786: extern volatile bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;
[; ;pic18f452.h: 3788: extern volatile bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;
[; ;pic18f452.h: 3790: extern volatile bit TO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f452.h: 3792: extern volatile bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;
[; ;pic18f452.h: 3794: extern volatile bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;
[; ;pic18f452.h: 3796: extern volatile bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;
[; ;pic18f452.h: 3798: extern volatile bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;
[; ;pic18f452.h: 3800: extern volatile bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
[; ;pic18f452.h: 3802: extern volatile bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
[; ;pic18f452.h: 3804: extern volatile bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
[; ;pic18f452.h: 3806: extern volatile bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
[; ;pic18f452.h: 3808: extern volatile bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
[; ;pic18f452.h: 3810: extern volatile bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
[; ;pic18f452.h: 3812: extern volatile bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;
[; ;pic18f452.h: 3814: extern volatile bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;
[; ;pic18f452.h: 3816: extern volatile bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;
[; ;pic18f452.h: 3818: extern volatile bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;
[; ;pic18f452.h: 3820: extern volatile bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;
[; ;pic18f452.h: 3822: extern volatile bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;
[; ;pic18f452.h: 3824: extern volatile bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;
[; ;pic18f452.h: 3826: extern volatile bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;
[; ;pic18f452.h: 3828: extern volatile bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;
[; ;pic18f452.h: 3830: extern volatile bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;
[; ;pic18f452.h: 3832: extern volatile bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;
[; ;pic18f452.h: 3834: extern volatile bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;
[; ;pic18f452.h: 3836: extern volatile bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;
[; ;pic18f452.h: 3838: extern volatile bit TRISC4 @ (((unsigned) &TRISC)*8) + 4;
[; ;pic18f452.h: 3840: extern volatile bit TRISC5 @ (((unsigned) &TRISC)*8) + 5;
[; ;pic18f452.h: 3842: extern volatile bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;
[; ;pic18f452.h: 3844: extern volatile bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;
[; ;pic18f452.h: 3846: extern volatile bit TRISD0 @ (((unsigned) &TRISD)*8) + 0;
[; ;pic18f452.h: 3848: extern volatile bit TRISD1 @ (((unsigned) &TRISD)*8) + 1;
[; ;pic18f452.h: 3850: extern volatile bit TRISD2 @ (((unsigned) &TRISD)*8) + 2;
[; ;pic18f452.h: 3852: extern volatile bit TRISD3 @ (((unsigned) &TRISD)*8) + 3;
[; ;pic18f452.h: 3854: extern volatile bit TRISD4 @ (((unsigned) &TRISD)*8) + 4;
[; ;pic18f452.h: 3856: extern volatile bit TRISD5 @ (((unsigned) &TRISD)*8) + 5;
[; ;pic18f452.h: 3858: extern volatile bit TRISD6 @ (((unsigned) &TRISD)*8) + 6;
[; ;pic18f452.h: 3860: extern volatile bit TRISD7 @ (((unsigned) &TRISD)*8) + 7;
[; ;pic18f452.h: 3862: extern volatile bit TRISE0 @ (((unsigned) &TRISE)*8) + 0;
[; ;pic18f452.h: 3864: extern volatile bit TRISE1 @ (((unsigned) &TRISE)*8) + 1;
[; ;pic18f452.h: 3866: extern volatile bit TRISE2 @ (((unsigned) &TRISE)*8) + 2;
[; ;pic18f452.h: 3868: extern volatile bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
[; ;pic18f452.h: 3870: extern volatile bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;
[; ;pic18f452.h: 3872: extern volatile bit TX @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f452.h: 3874: extern volatile bit TX1IE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic18f452.h: 3876: extern volatile bit TX1IF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic18f452.h: 3878: extern volatile bit TX1IP @ (((unsigned) &IPR1)*8) + 4;
[; ;pic18f452.h: 3880: extern volatile bit TX8_9 @ (((unsigned) &TXSTA)*8) + 6;
[; ;pic18f452.h: 3882: extern volatile bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
[; ;pic18f452.h: 3884: extern volatile bit TX91 @ (((unsigned) &TXSTA)*8) + 6;
[; ;pic18f452.h: 3886: extern volatile bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
[; ;pic18f452.h: 3888: extern volatile bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;
[; ;pic18f452.h: 3890: extern volatile bit TXD8 @ (((unsigned) &TXSTA)*8) + 0;
[; ;pic18f452.h: 3892: extern volatile bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
[; ;pic18f452.h: 3894: extern volatile bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;
[; ;pic18f452.h: 3896: extern volatile bit TXIE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic18f452.h: 3898: extern volatile bit TXIF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic18f452.h: 3900: extern volatile bit TXIP @ (((unsigned) &IPR1)*8) + 4;
[; ;pic18f452.h: 3902: extern volatile bit UA @ (((unsigned) &SSPSTAT)*8) + 1;
[; ;pic18f452.h: 3904: extern volatile bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f452.h: 3906: extern volatile bit VREFM @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f452.h: 3908: extern volatile bit VREFP @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f452.h: 3910: extern volatile bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;
[; ;pic18f452.h: 3912: extern volatile bit __attribute__((__deprecated__)) WR @ (((unsigned) &EECON1)*8) + 1;
[; ;pic18f452.h: 3914: extern volatile bit WRE @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f452.h: 3916: extern volatile bit WREN @ (((unsigned) &EECON1)*8) + 2;
[; ;pic18f452.h: 3918: extern volatile bit WRERR @ (((unsigned) &EECON1)*8) + 3;
[; ;pic18f452.h: 3920: extern volatile bit ZERO @ (((unsigned) &STATUS)*8) + 2;
[; ;pic18f452.h: 3922: extern volatile bit nA @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3924: extern volatile bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f452.h: 3926: extern volatile bit nBOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f452.h: 3928: extern volatile bit nDONE @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f452.h: 3930: extern volatile bit nIPEN @ (((unsigned) &RCON)*8) + 7;
[; ;pic18f452.h: 3932: extern volatile bit nPD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f452.h: 3934: extern volatile bit nPOR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f452.h: 3936: extern volatile bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f452.h: 3938: extern volatile bit nRC8 @ (((unsigned) &RCSTA)*8) + 6;
[; ;pic18f452.h: 3940: extern volatile bit nRI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f452.h: 3942: extern volatile bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f452.h: 3944: extern volatile bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f452.h: 3946: extern volatile bit nTO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f452.h: 3948: extern volatile bit nTX8 @ (((unsigned) &TXSTA)*8) + 6;
[; ;pic18f452.h: 3950: extern volatile bit nW @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f452.h: 3952: extern volatile bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;stdio.h: 12: typedef int ptrdiff_t;
[; ;stdio.h: 13: typedef unsigned size_t;
[; ;stdio.h: 14: typedef unsigned short wchar_t;
[; ;stdarg.h: 31: typedef void * va_list[1];
[; ;stdarg.h: 34: extern void * __va_start(void);
[; ;stdarg.h: 37: extern void * __va_arg(void *, ...);
[; ;stdio.h: 27: extern int errno;
[; ;stdio.h: 58: struct __prbuf
[; ;stdio.h: 59: {
[; ;stdio.h: 60: char * ptr;
[; ;stdio.h: 61: void (* func)(char);
[; ;stdio.h: 62: };
[; ;conio.h: 17: extern int errno;
[; ;conio.h: 20: extern void init_uart(void);
[; ;conio.h: 22: extern char getch(void);
[; ;conio.h: 23: extern char getche(void);
[; ;conio.h: 24: extern void putch(char);
[; ;conio.h: 25: extern void ungetch(char);
[; ;conio.h: 27: extern bit kbhit(void);
[; ;conio.h: 31: extern char * cgets(char *);
[; ;conio.h: 32: extern void cputs(const char *);
[; ;stdio.h: 103: extern int cprintf(char *, ...);
[; ;stdio.h: 108: extern int _doprnt(struct __prbuf *, const register char *, register va_list);
[; ;stdio.h: 195: extern char * gets(char *);
[; ;stdio.h: 196: extern int puts(const char *);
[; ;stdio.h: 197: extern int scanf(const char *, ...);
[; ;stdio.h: 198: extern int sscanf(const char *, const char *, ...);
[; ;stdio.h: 199: extern int vprintf(const char *, va_list);
[; ;stdio.h: 200: extern int vsprintf(char *, const char *, va_list);
[; ;stdio.h: 201: extern int vscanf(const char *, va_list ap);
[; ;stdio.h: 202: extern int vsscanf(const char *, const char *, va_list);
[; ;stdio.h: 206: extern int sprintf(char *, const char *, ...);
[; ;stdio.h: 207: extern int printf(const char *, ...);
[; ;adc.h: 971: union ADCResult
[; ;adc.h: 972: {
[; ;adc.h: 973: int lr;
[; ;adc.h: 974: char br[2];
[; ;adc.h: 975: };
[; ;adc.h: 977: char BusyADC (void);
[; ;adc.h: 979: void ConvertADC (void);
[; ;adc.h: 981: int ReadADC(void);
[; ;adc.h: 983: void CloseADC(void);
[; ;adc.h: 988: void OpenADC ( unsigned char ,
[; ;adc.h: 989: unsigned char );
[; ;adc.h: 1028: void SetChanADC(unsigned char );
[; ;adc.h: 1031: void SelChanConvADC( unsigned char );
[; ;spi.h: 584: void OpenSPI( unsigned char sync_mode,
[; ;spi.h: 585: unsigned char bus_mode,
[; ;spi.h: 586: unsigned char smp_phase );
[; ;spi.h: 588: unsigned char WriteSPI( unsigned char data_out );
[; ;spi.h: 590: void getsSPI( unsigned char *rdptr, unsigned char length );
[; ;spi.h: 592: void putsSPI( unsigned char *wrptr );
[; ;spi.h: 594: unsigned char ReadSPI( void );
[; ;can2510.h: 414: void CAN2510Initialize(  unsigned int configuration,
[; ;can2510.h: 415: unsigned char brp,
[; ;can2510.h: 416: unsigned char interruptFlags,
[; ;can2510.h: 417: unsigned char SPI_syncMode,
[; ;can2510.h: 418: unsigned char SPI_busMode,
[; ;can2510.h: 419: unsigned char SPI_smpPhase );
[; ;can2510.h: 421: unsigned char CAN2510Init(  unsigned short long BufferConfig,
[; ;can2510.h: 422: unsigned short long BitTimeConfig,
[; ;can2510.h: 423: unsigned char interruptEnables,
[; ;can2510.h: 424: unsigned char SPI_syncMode,
[; ;can2510.h: 425: unsigned char SPI_busMode,
[; ;can2510.h: 426: unsigned char SPI_smpPhase );
[; ;can2510.h: 428: void CAN2510Enable( void );
[; ;can2510.h: 430: void CAN2510Disable( void );
[; ;can2510.h: 432: void CAN2510Reset( void );
[; ;can2510.h: 434: void CAN2510SetMode(  unsigned char mode );
[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );
[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );
[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );
[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );
[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );
[; ;can2510.h: 446: unsigned char CAN2510ByteRead(  unsigned char addr );
[; ;can2510.h: 448: void CAN2510ByteWrite(  unsigned char addr,  unsigned char value );
[; ;can2510.h: 450: void CAN2510SequentialRead(  unsigned char *DataArray,
[; ;can2510.h: 451: unsigned char CAN2510addr,
[; ;can2510.h: 452: unsigned char numbytes );
[; ;can2510.h: 454: void CAN2510SequentialWrite(  unsigned char *DataArray,
[; ;can2510.h: 455: unsigned char CAN2510addr,
[; ;can2510.h: 456: unsigned char numbytes );
[; ;can2510.h: 458: void CAN2510BitModify(  unsigned char address,
[; ;can2510.h: 459: unsigned char mask,
[; ;can2510.h: 460: unsigned char data );
[; ;can2510.h: 462: void CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );
[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );
[; ;can2510.h: 466: void CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );
[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );
[; ;can2510.h: 470: unsigned char CAN2510SetMsgFilterStd(  unsigned char bufferNum,
[; ;can2510.h: 471: unsigned int mask,
[; ;can2510.h: 472: unsigned int *filters );
[; ;can2510.h: 474: unsigned char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,
[; ;can2510.h: 475: unsigned long mask,
[; ;can2510.h: 476: unsigned long *filters );
[; ;can2510.h: 478: unsigned char CAN2510WriteStd(  unsigned int msgId,
[; ;can2510.h: 479: unsigned char msgPriority,
[; ;can2510.h: 480: unsigned char numBytes,
[; ;can2510.h: 481: unsigned char *data );
[; ;can2510.h: 483: unsigned char CAN2510WriteXtd(  unsigned long msgId,
[; ;can2510.h: 484: unsigned char msgPriority,
[; ;can2510.h: 485: unsigned char numBytes,
[; ;can2510.h: 486: unsigned char *data );
[; ;can2510.h: 488: void CAN2510LoadBufferStd(  unsigned char bufferNum,
[; ;can2510.h: 489: unsigned int msgId,
[; ;can2510.h: 490: unsigned char numBytes,
[; ;can2510.h: 491: unsigned char *data );
[; ;can2510.h: 493: void CAN2510LoadBufferXtd(  unsigned char bufferNum,
[; ;can2510.h: 494: unsigned long msgId,
[; ;can2510.h: 495: unsigned char numBytes,
[; ;can2510.h: 496: unsigned char *data );
[; ;can2510.h: 498: void CAN2510LoadRTRStd(  unsigned char bufferNum,
[; ;can2510.h: 499: unsigned int msgId,
[; ;can2510.h: 500: unsigned char numBytes );
[; ;can2510.h: 502: void CAN2510LoadRTRXtd(  unsigned char bufferNum,
[; ;can2510.h: 503: unsigned long msgId,
[; ;can2510.h: 504: unsigned char numBytes );
[; ;can2510.h: 506: void CAN2510SetBufferPriority(  unsigned char bufferNum,
[; ;can2510.h: 507: unsigned char bufferPriority );
[; ;can2510.h: 509: void CAN2510SendBuffer(  unsigned char bufferNumber );
[; ;can2510.h: 511: unsigned char CAN2510WriteBuffer(  unsigned char bufferNum );
[; ;can2510.h: 513: unsigned char CAN2510DataReady(  unsigned char bufferNum );
[; ;can2510.h: 515: unsigned char CAN2510DataRead(  unsigned char bufferNum,
[; ;can2510.h: 516: unsigned long *msgId,
[; ;can2510.h: 517: unsigned char *numBytes,
[; ;can2510.h: 518: unsigned char *data );
[; ;capture.h: 64: union capstatus
[; ;capture.h: 65: {
[; ;capture.h: 72: struct
[; ;capture.h: 73: {
[; ;capture.h: 76: unsigned Cap1OVF:1;
[; ;capture.h: 81: unsigned Cap2OVF:1;
[; ;capture.h: 114: };
[; ;capture.h: 116: unsigned :8;
[; ;capture.h: 118: };
[; ;capture.h: 120: extern union capstatus CapStatus;
[; ;capture.h: 122: union CapResult
[; ;capture.h: 123: {
[; ;capture.h: 124: unsigned int lc;
[; ;capture.h: 125: char bc[2];
[; ;capture.h: 126: };
[; ;capture.h: 425: void OpenCapture1 ( unsigned char config);
[; ;capture.h: 426: unsigned int ReadCapture1 (void);
[; ;capture.h: 427: void CloseCapture1 (void);
[; ;capture.h: 435: void OpenCapture2 ( unsigned char config);
[; ;capture.h: 436: unsigned int ReadCapture2 (void);
[; ;capture.h: 437: void CloseCapture2 (void);
[; ;compare.h: 336: void OpenCompare1(unsigned char config,unsigned int period);
[; ;compare.h: 337: void CloseCompare1(void);
[; ;compare.h: 343: void OpenCompare2(unsigned char config, unsigned int period);
[; ;compare.h: 344: void CloseCompare2(void);
[; ;EEP.h: 36: void Busy_eep ( void );
[; ;EEP.h: 37: unsigned char Read_b_eep( unsigned int badd );
[; ;EEP.h: 38: void Write_b_eep( unsigned int badd, unsigned char bdata );
[; ;stddef.h: 13: extern int errno;
[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;
[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;
[; ;GenericTypeDefs.h: 75: typedef signed int INT;
[; ;GenericTypeDefs.h: 76: typedef signed char INT8;
[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;
[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;
[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;
[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;
[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;
[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;
[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;
[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;
[; ;GenericTypeDefs.h: 99: typedef union
[; ;GenericTypeDefs.h: 100: {
[; ;GenericTypeDefs.h: 101: UINT8 Val;
[; ;GenericTypeDefs.h: 102: struct
[; ;GenericTypeDefs.h: 103: {
[; ;GenericTypeDefs.h: 104: UINT8 b0:1;
[; ;GenericTypeDefs.h: 105: UINT8 b1:1;
[; ;GenericTypeDefs.h: 106: UINT8 b2:1;
[; ;GenericTypeDefs.h: 107: UINT8 b3:1;
[; ;GenericTypeDefs.h: 108: UINT8 b4:1;
[; ;GenericTypeDefs.h: 109: UINT8 b5:1;
[; ;GenericTypeDefs.h: 110: UINT8 b6:1;
[; ;GenericTypeDefs.h: 111: UINT8 b7:1;
[; ;GenericTypeDefs.h: 112: } bits;
[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;
[; ;GenericTypeDefs.h: 115: typedef union
[; ;GenericTypeDefs.h: 116: {
[; ;GenericTypeDefs.h: 117: UINT16 Val;
[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;
[; ;GenericTypeDefs.h: 119: struct 
[; ;GenericTypeDefs.h: 120: {
[; ;GenericTypeDefs.h: 121: UINT8 LB;
[; ;GenericTypeDefs.h: 122: UINT8 HB;
[; ;GenericTypeDefs.h: 123: } byte;
[; ;GenericTypeDefs.h: 124: struct 
[; ;GenericTypeDefs.h: 125: {
[; ;GenericTypeDefs.h: 126: UINT8 b0:1;
[; ;GenericTypeDefs.h: 127: UINT8 b1:1;
[; ;GenericTypeDefs.h: 128: UINT8 b2:1;
[; ;GenericTypeDefs.h: 129: UINT8 b3:1;
[; ;GenericTypeDefs.h: 130: UINT8 b4:1;
[; ;GenericTypeDefs.h: 131: UINT8 b5:1;
[; ;GenericTypeDefs.h: 132: UINT8 b6:1;
[; ;GenericTypeDefs.h: 133: UINT8 b7:1;
[; ;GenericTypeDefs.h: 134: UINT8 b8:1;
[; ;GenericTypeDefs.h: 135: UINT8 b9:1;
[; ;GenericTypeDefs.h: 136: UINT8 b10:1;
[; ;GenericTypeDefs.h: 137: UINT8 b11:1;
[; ;GenericTypeDefs.h: 138: UINT8 b12:1;
[; ;GenericTypeDefs.h: 139: UINT8 b13:1;
[; ;GenericTypeDefs.h: 140: UINT8 b14:1;
[; ;GenericTypeDefs.h: 141: UINT8 b15:1;
[; ;GenericTypeDefs.h: 142: } bits;
[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;
[; ;GenericTypeDefs.h: 187: typedef union
[; ;GenericTypeDefs.h: 188: {
[; ;GenericTypeDefs.h: 189: UINT32 Val;
[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;
[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;
[; ;GenericTypeDefs.h: 192: struct 
[; ;GenericTypeDefs.h: 193: {
[; ;GenericTypeDefs.h: 194: UINT16 LW;
[; ;GenericTypeDefs.h: 195: UINT16 HW;
[; ;GenericTypeDefs.h: 196: } word;
[; ;GenericTypeDefs.h: 197: struct 
[; ;GenericTypeDefs.h: 198: {
[; ;GenericTypeDefs.h: 199: UINT8 LB;
[; ;GenericTypeDefs.h: 200: UINT8 HB;
[; ;GenericTypeDefs.h: 201: UINT8 UB;
[; ;GenericTypeDefs.h: 202: UINT8 MB;
[; ;GenericTypeDefs.h: 203: } byte;
[; ;GenericTypeDefs.h: 204: struct 
[; ;GenericTypeDefs.h: 205: {
[; ;GenericTypeDefs.h: 206: UINT16_VAL low;
[; ;GenericTypeDefs.h: 207: UINT16_VAL high;
[; ;GenericTypeDefs.h: 208: }wordUnion;
[; ;GenericTypeDefs.h: 209: struct 
[; ;GenericTypeDefs.h: 210: {
[; ;GenericTypeDefs.h: 211: UINT8 b0:1;
[; ;GenericTypeDefs.h: 212: UINT8 b1:1;
[; ;GenericTypeDefs.h: 213: UINT8 b2:1;
[; ;GenericTypeDefs.h: 214: UINT8 b3:1;
[; ;GenericTypeDefs.h: 215: UINT8 b4:1;
[; ;GenericTypeDefs.h: 216: UINT8 b5:1;
[; ;GenericTypeDefs.h: 217: UINT8 b6:1;
[; ;GenericTypeDefs.h: 218: UINT8 b7:1;
[; ;GenericTypeDefs.h: 219: UINT8 b8:1;
[; ;GenericTypeDefs.h: 220: UINT8 b9:1;
[; ;GenericTypeDefs.h: 221: UINT8 b10:1;
[; ;GenericTypeDefs.h: 222: UINT8 b11:1;
[; ;GenericTypeDefs.h: 223: UINT8 b12:1;
[; ;GenericTypeDefs.h: 224: UINT8 b13:1;
[; ;GenericTypeDefs.h: 225: UINT8 b14:1;
[; ;GenericTypeDefs.h: 226: UINT8 b15:1;
[; ;GenericTypeDefs.h: 227: UINT8 b16:1;
[; ;GenericTypeDefs.h: 228: UINT8 b17:1;
[; ;GenericTypeDefs.h: 229: UINT8 b18:1;
[; ;GenericTypeDefs.h: 230: UINT8 b19:1;
[; ;GenericTypeDefs.h: 231: UINT8 b20:1;
[; ;GenericTypeDefs.h: 232: UINT8 b21:1;
[; ;GenericTypeDefs.h: 233: UINT8 b22:1;
[; ;GenericTypeDefs.h: 234: UINT8 b23:1;
[; ;GenericTypeDefs.h: 235: UINT8 b24:1;
[; ;GenericTypeDefs.h: 236: UINT8 b25:1;
[; ;GenericTypeDefs.h: 237: UINT8 b26:1;
[; ;GenericTypeDefs.h: 238: UINT8 b27:1;
[; ;GenericTypeDefs.h: 239: UINT8 b28:1;
[; ;GenericTypeDefs.h: 240: UINT8 b29:1;
[; ;GenericTypeDefs.h: 241: UINT8 b30:1;
[; ;GenericTypeDefs.h: 242: UINT8 b31:1;
[; ;GenericTypeDefs.h: 243: } bits;
[; ;GenericTypeDefs.h: 244: } UINT32_VAL;
[; ;GenericTypeDefs.h: 248: typedef union
[; ;GenericTypeDefs.h: 249: {
[; ;GenericTypeDefs.h: 250: UINT64 Val;
[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;
[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;
[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;
[; ;GenericTypeDefs.h: 254: struct 
[; ;GenericTypeDefs.h: 255: {
[; ;GenericTypeDefs.h: 256: UINT32 LD;
[; ;GenericTypeDefs.h: 257: UINT32 HD;
[; ;GenericTypeDefs.h: 258: } dword;
[; ;GenericTypeDefs.h: 259: struct 
[; ;GenericTypeDefs.h: 260: {
[; ;GenericTypeDefs.h: 261: UINT16 LW;
[; ;GenericTypeDefs.h: 262: UINT16 HW;
[; ;GenericTypeDefs.h: 263: UINT16 UW;
[; ;GenericTypeDefs.h: 264: UINT16 MW;
[; ;GenericTypeDefs.h: 265: } word;
[; ;GenericTypeDefs.h: 266: struct 
[; ;GenericTypeDefs.h: 267: {
[; ;GenericTypeDefs.h: 268: UINT8 b0:1;
[; ;GenericTypeDefs.h: 269: UINT8 b1:1;
[; ;GenericTypeDefs.h: 270: UINT8 b2:1;
[; ;GenericTypeDefs.h: 271: UINT8 b3:1;
[; ;GenericTypeDefs.h: 272: UINT8 b4:1;
[; ;GenericTypeDefs.h: 273: UINT8 b5:1;
[; ;GenericTypeDefs.h: 274: UINT8 b6:1;
[; ;GenericTypeDefs.h: 275: UINT8 b7:1;
[; ;GenericTypeDefs.h: 276: UINT8 b8:1;
[; ;GenericTypeDefs.h: 277: UINT8 b9:1;
[; ;GenericTypeDefs.h: 278: UINT8 b10:1;
[; ;GenericTypeDefs.h: 279: UINT8 b11:1;
[; ;GenericTypeDefs.h: 280: UINT8 b12:1;
[; ;GenericTypeDefs.h: 281: UINT8 b13:1;
[; ;GenericTypeDefs.h: 282: UINT8 b14:1;
[; ;GenericTypeDefs.h: 283: UINT8 b15:1;
[; ;GenericTypeDefs.h: 284: UINT8 b16:1;
[; ;GenericTypeDefs.h: 285: UINT8 b17:1;
[; ;GenericTypeDefs.h: 286: UINT8 b18:1;
[; ;GenericTypeDefs.h: 287: UINT8 b19:1;
[; ;GenericTypeDefs.h: 288: UINT8 b20:1;
[; ;GenericTypeDefs.h: 289: UINT8 b21:1;
[; ;GenericTypeDefs.h: 290: UINT8 b22:1;
[; ;GenericTypeDefs.h: 291: UINT8 b23:1;
[; ;GenericTypeDefs.h: 292: UINT8 b24:1;
[; ;GenericTypeDefs.h: 293: UINT8 b25:1;
[; ;GenericTypeDefs.h: 294: UINT8 b26:1;
[; ;GenericTypeDefs.h: 295: UINT8 b27:1;
[; ;GenericTypeDefs.h: 296: UINT8 b28:1;
[; ;GenericTypeDefs.h: 297: UINT8 b29:1;
[; ;GenericTypeDefs.h: 298: UINT8 b30:1;
[; ;GenericTypeDefs.h: 299: UINT8 b31:1;
[; ;GenericTypeDefs.h: 300: UINT8 b32:1;
[; ;GenericTypeDefs.h: 301: UINT8 b33:1;
[; ;GenericTypeDefs.h: 302: UINT8 b34:1;
[; ;GenericTypeDefs.h: 303: UINT8 b35:1;
[; ;GenericTypeDefs.h: 304: UINT8 b36:1;
[; ;GenericTypeDefs.h: 305: UINT8 b37:1;
[; ;GenericTypeDefs.h: 306: UINT8 b38:1;
[; ;GenericTypeDefs.h: 307: UINT8 b39:1;
[; ;GenericTypeDefs.h: 308: UINT8 b40:1;
[; ;GenericTypeDefs.h: 309: UINT8 b41:1;
[; ;GenericTypeDefs.h: 310: UINT8 b42:1;
[; ;GenericTypeDefs.h: 311: UINT8 b43:1;
[; ;GenericTypeDefs.h: 312: UINT8 b44:1;
[; ;GenericTypeDefs.h: 313: UINT8 b45:1;
[; ;GenericTypeDefs.h: 314: UINT8 b46:1;
[; ;GenericTypeDefs.h: 315: UINT8 b47:1;
[; ;GenericTypeDefs.h: 316: UINT8 b48:1;
[; ;GenericTypeDefs.h: 317: UINT8 b49:1;
[; ;GenericTypeDefs.h: 318: UINT8 b50:1;
[; ;GenericTypeDefs.h: 319: UINT8 b51:1;
[; ;GenericTypeDefs.h: 320: UINT8 b52:1;
[; ;GenericTypeDefs.h: 321: UINT8 b53:1;
[; ;GenericTypeDefs.h: 322: UINT8 b54:1;
[; ;GenericTypeDefs.h: 323: UINT8 b55:1;
[; ;GenericTypeDefs.h: 324: UINT8 b56:1;
[; ;GenericTypeDefs.h: 325: UINT8 b57:1;
[; ;GenericTypeDefs.h: 326: UINT8 b58:1;
[; ;GenericTypeDefs.h: 327: UINT8 b59:1;
[; ;GenericTypeDefs.h: 328: UINT8 b60:1;
[; ;GenericTypeDefs.h: 329: UINT8 b61:1;
[; ;GenericTypeDefs.h: 330: UINT8 b62:1;
[; ;GenericTypeDefs.h: 331: UINT8 b63:1;
[; ;GenericTypeDefs.h: 332: } bits;
[; ;GenericTypeDefs.h: 333: } UINT64_VAL;
[; ;GenericTypeDefs.h: 339: typedef void VOID;
[; ;GenericTypeDefs.h: 341: typedef char CHAR8;
[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;
[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;
[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;
[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;
[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;
[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;
[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;
[; ;GenericTypeDefs.h: 352: typedef signed long LONG;
[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;
[; ;GenericTypeDefs.h: 356: typedef union
[; ;GenericTypeDefs.h: 357: {
[; ;GenericTypeDefs.h: 358: BYTE Val;
[; ;GenericTypeDefs.h: 359: struct 
[; ;GenericTypeDefs.h: 360: {
[; ;GenericTypeDefs.h: 361: BYTE b0:1;
[; ;GenericTypeDefs.h: 362: BYTE b1:1;
[; ;GenericTypeDefs.h: 363: BYTE b2:1;
[; ;GenericTypeDefs.h: 364: BYTE b3:1;
[; ;GenericTypeDefs.h: 365: BYTE b4:1;
[; ;GenericTypeDefs.h: 366: BYTE b5:1;
[; ;GenericTypeDefs.h: 367: BYTE b6:1;
[; ;GenericTypeDefs.h: 368: BYTE b7:1;
[; ;GenericTypeDefs.h: 369: } bits;
[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;
[; ;GenericTypeDefs.h: 372: typedef union
[; ;GenericTypeDefs.h: 373: {
[; ;GenericTypeDefs.h: 374: WORD Val;
[; ;GenericTypeDefs.h: 375: BYTE v[2] ;
[; ;GenericTypeDefs.h: 376: struct 
[; ;GenericTypeDefs.h: 377: {
[; ;GenericTypeDefs.h: 378: BYTE LB;
[; ;GenericTypeDefs.h: 379: BYTE HB;
[; ;GenericTypeDefs.h: 380: } byte;
[; ;GenericTypeDefs.h: 381: struct 
[; ;GenericTypeDefs.h: 382: {
[; ;GenericTypeDefs.h: 383: BYTE b0:1;
[; ;GenericTypeDefs.h: 384: BYTE b1:1;
[; ;GenericTypeDefs.h: 385: BYTE b2:1;
[; ;GenericTypeDefs.h: 386: BYTE b3:1;
[; ;GenericTypeDefs.h: 387: BYTE b4:1;
[; ;GenericTypeDefs.h: 388: BYTE b5:1;
[; ;GenericTypeDefs.h: 389: BYTE b6:1;
[; ;GenericTypeDefs.h: 390: BYTE b7:1;
[; ;GenericTypeDefs.h: 391: BYTE b8:1;
[; ;GenericTypeDefs.h: 392: BYTE b9:1;
[; ;GenericTypeDefs.h: 393: BYTE b10:1;
[; ;GenericTypeDefs.h: 394: BYTE b11:1;
[; ;GenericTypeDefs.h: 395: BYTE b12:1;
[; ;GenericTypeDefs.h: 396: BYTE b13:1;
[; ;GenericTypeDefs.h: 397: BYTE b14:1;
[; ;GenericTypeDefs.h: 398: BYTE b15:1;
[; ;GenericTypeDefs.h: 399: } bits;
[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;
[; ;GenericTypeDefs.h: 402: typedef union
[; ;GenericTypeDefs.h: 403: {
[; ;GenericTypeDefs.h: 404: DWORD Val;
[; ;GenericTypeDefs.h: 405: WORD w[2] ;
[; ;GenericTypeDefs.h: 406: BYTE v[4] ;
[; ;GenericTypeDefs.h: 407: struct 
[; ;GenericTypeDefs.h: 408: {
[; ;GenericTypeDefs.h: 409: WORD LW;
[; ;GenericTypeDefs.h: 410: WORD HW;
[; ;GenericTypeDefs.h: 411: } word;
[; ;GenericTypeDefs.h: 412: struct 
[; ;GenericTypeDefs.h: 413: {
[; ;GenericTypeDefs.h: 414: BYTE LB;
[; ;GenericTypeDefs.h: 415: BYTE HB;
[; ;GenericTypeDefs.h: 416: BYTE UB;
[; ;GenericTypeDefs.h: 417: BYTE MB;
[; ;GenericTypeDefs.h: 418: } byte;
[; ;GenericTypeDefs.h: 419: struct 
[; ;GenericTypeDefs.h: 420: {
[; ;GenericTypeDefs.h: 421: WORD_VAL low;
[; ;GenericTypeDefs.h: 422: WORD_VAL high;
[; ;GenericTypeDefs.h: 423: }wordUnion;
[; ;GenericTypeDefs.h: 424: struct 
[; ;GenericTypeDefs.h: 425: {
[; ;GenericTypeDefs.h: 426: BYTE b0:1;
[; ;GenericTypeDefs.h: 427: BYTE b1:1;
[; ;GenericTypeDefs.h: 428: BYTE b2:1;
[; ;GenericTypeDefs.h: 429: BYTE b3:1;
[; ;GenericTypeDefs.h: 430: BYTE b4:1;
[; ;GenericTypeDefs.h: 431: BYTE b5:1;
[; ;GenericTypeDefs.h: 432: BYTE b6:1;
[; ;GenericTypeDefs.h: 433: BYTE b7:1;
[; ;GenericTypeDefs.h: 434: BYTE b8:1;
[; ;GenericTypeDefs.h: 435: BYTE b9:1;
[; ;GenericTypeDefs.h: 436: BYTE b10:1;
[; ;GenericTypeDefs.h: 437: BYTE b11:1;
[; ;GenericTypeDefs.h: 438: BYTE b12:1;
[; ;GenericTypeDefs.h: 439: BYTE b13:1;
[; ;GenericTypeDefs.h: 440: BYTE b14:1;
[; ;GenericTypeDefs.h: 441: BYTE b15:1;
[; ;GenericTypeDefs.h: 442: BYTE b16:1;
[; ;GenericTypeDefs.h: 443: BYTE b17:1;
[; ;GenericTypeDefs.h: 444: BYTE b18:1;
[; ;GenericTypeDefs.h: 445: BYTE b19:1;
[; ;GenericTypeDefs.h: 446: BYTE b20:1;
[; ;GenericTypeDefs.h: 447: BYTE b21:1;
[; ;GenericTypeDefs.h: 448: BYTE b22:1;
[; ;GenericTypeDefs.h: 449: BYTE b23:1;
[; ;GenericTypeDefs.h: 450: BYTE b24:1;
[; ;GenericTypeDefs.h: 451: BYTE b25:1;
[; ;GenericTypeDefs.h: 452: BYTE b26:1;
[; ;GenericTypeDefs.h: 453: BYTE b27:1;
[; ;GenericTypeDefs.h: 454: BYTE b28:1;
[; ;GenericTypeDefs.h: 455: BYTE b29:1;
[; ;GenericTypeDefs.h: 456: BYTE b30:1;
[; ;GenericTypeDefs.h: 457: BYTE b31:1;
[; ;GenericTypeDefs.h: 458: } bits;
[; ;GenericTypeDefs.h: 459: } DWORD_VAL;
[; ;GenericTypeDefs.h: 462: typedef union
[; ;GenericTypeDefs.h: 463: {
[; ;GenericTypeDefs.h: 464: QWORD Val;
[; ;GenericTypeDefs.h: 465: DWORD d[2] ;
[; ;GenericTypeDefs.h: 466: WORD w[4] ;
[; ;GenericTypeDefs.h: 467: BYTE v[8] ;
[; ;GenericTypeDefs.h: 468: struct 
[; ;GenericTypeDefs.h: 469: {
[; ;GenericTypeDefs.h: 470: DWORD LD;
[; ;GenericTypeDefs.h: 471: DWORD HD;
[; ;GenericTypeDefs.h: 472: } dword;
[; ;GenericTypeDefs.h: 473: struct 
[; ;GenericTypeDefs.h: 474: {
[; ;GenericTypeDefs.h: 475: WORD LW;
[; ;GenericTypeDefs.h: 476: WORD HW;
[; ;GenericTypeDefs.h: 477: WORD UW;
[; ;GenericTypeDefs.h: 478: WORD MW;
[; ;GenericTypeDefs.h: 479: } word;
[; ;GenericTypeDefs.h: 480: struct 
[; ;GenericTypeDefs.h: 481: {
[; ;GenericTypeDefs.h: 482: BYTE b0:1;
[; ;GenericTypeDefs.h: 483: BYTE b1:1;
[; ;GenericTypeDefs.h: 484: BYTE b2:1;
[; ;GenericTypeDefs.h: 485: BYTE b3:1;
[; ;GenericTypeDefs.h: 486: BYTE b4:1;
[; ;GenericTypeDefs.h: 487: BYTE b5:1;
[; ;GenericTypeDefs.h: 488: BYTE b6:1;
[; ;GenericTypeDefs.h: 489: BYTE b7:1;
[; ;GenericTypeDefs.h: 490: BYTE b8:1;
[; ;GenericTypeDefs.h: 491: BYTE b9:1;
[; ;GenericTypeDefs.h: 492: BYTE b10:1;
[; ;GenericTypeDefs.h: 493: BYTE b11:1;
[; ;GenericTypeDefs.h: 494: BYTE b12:1;
[; ;GenericTypeDefs.h: 495: BYTE b13:1;
[; ;GenericTypeDefs.h: 496: BYTE b14:1;
[; ;GenericTypeDefs.h: 497: BYTE b15:1;
[; ;GenericTypeDefs.h: 498: BYTE b16:1;
[; ;GenericTypeDefs.h: 499: BYTE b17:1;
[; ;GenericTypeDefs.h: 500: BYTE b18:1;
[; ;GenericTypeDefs.h: 501: BYTE b19:1;
[; ;GenericTypeDefs.h: 502: BYTE b20:1;
[; ;GenericTypeDefs.h: 503: BYTE b21:1;
[; ;GenericTypeDefs.h: 504: BYTE b22:1;
[; ;GenericTypeDefs.h: 505: BYTE b23:1;
[; ;GenericTypeDefs.h: 506: BYTE b24:1;
[; ;GenericTypeDefs.h: 507: BYTE b25:1;
[; ;GenericTypeDefs.h: 508: BYTE b26:1;
[; ;GenericTypeDefs.h: 509: BYTE b27:1;
[; ;GenericTypeDefs.h: 510: BYTE b28:1;
[; ;GenericTypeDefs.h: 511: BYTE b29:1;
[; ;GenericTypeDefs.h: 512: BYTE b30:1;
[; ;GenericTypeDefs.h: 513: BYTE b31:1;
[; ;GenericTypeDefs.h: 514: BYTE b32:1;
[; ;GenericTypeDefs.h: 515: BYTE b33:1;
[; ;GenericTypeDefs.h: 516: BYTE b34:1;
[; ;GenericTypeDefs.h: 517: BYTE b35:1;
[; ;GenericTypeDefs.h: 518: BYTE b36:1;
[; ;GenericTypeDefs.h: 519: BYTE b37:1;
[; ;GenericTypeDefs.h: 520: BYTE b38:1;
[; ;GenericTypeDefs.h: 521: BYTE b39:1;
[; ;GenericTypeDefs.h: 522: BYTE b40:1;
[; ;GenericTypeDefs.h: 523: BYTE b41:1;
[; ;GenericTypeDefs.h: 524: BYTE b42:1;
[; ;GenericTypeDefs.h: 525: BYTE b43:1;
[; ;GenericTypeDefs.h: 526: BYTE b44:1;
[; ;GenericTypeDefs.h: 527: BYTE b45:1;
[; ;GenericTypeDefs.h: 528: BYTE b46:1;
[; ;GenericTypeDefs.h: 529: BYTE b47:1;
[; ;GenericTypeDefs.h: 530: BYTE b48:1;
[; ;GenericTypeDefs.h: 531: BYTE b49:1;
[; ;GenericTypeDefs.h: 532: BYTE b50:1;
[; ;GenericTypeDefs.h: 533: BYTE b51:1;
[; ;GenericTypeDefs.h: 534: BYTE b52:1;
[; ;GenericTypeDefs.h: 535: BYTE b53:1;
[; ;GenericTypeDefs.h: 536: BYTE b54:1;
[; ;GenericTypeDefs.h: 537: BYTE b55:1;
[; ;GenericTypeDefs.h: 538: BYTE b56:1;
[; ;GenericTypeDefs.h: 539: BYTE b57:1;
[; ;GenericTypeDefs.h: 540: BYTE b58:1;
[; ;GenericTypeDefs.h: 541: BYTE b59:1;
[; ;GenericTypeDefs.h: 542: BYTE b60:1;
[; ;GenericTypeDefs.h: 543: BYTE b61:1;
[; ;GenericTypeDefs.h: 544: BYTE b62:1;
[; ;GenericTypeDefs.h: 545: BYTE b63:1;
[; ;GenericTypeDefs.h: 546: } bits;
[; ;GenericTypeDefs.h: 547: } QWORD_VAL;
[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);
[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);
[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
[; ;i2c.h: 769: void IdleI2C( void );
[; ;i2c.h: 771: void OpenI2C( unsigned char sync_mode, unsigned char slew );
[; ;i2c.h: 773: unsigned char WriteI2C( unsigned char data_out );
[; ;i2c.h: 775: signed char putsI2C( unsigned char *wrptr );
[; ;i2c.h: 777: unsigned char ReadI2C( void );
[; ;i2c.h: 779: void CloseI2C( void );
[; ;i2c.h: 893: unsigned char WriteI2C( unsigned char data_out );
[; ;i2c.h: 895: unsigned char getsI2C( unsigned char *rdptr, unsigned char length );
[; ;i2c.h: 902: unsigned char EEAckPolling( unsigned char control );
[; ;i2c.h: 904: unsigned char EEByteWrite( unsigned char control,
[; ;i2c.h: 905: unsigned char address,
[; ;i2c.h: 906: unsigned char data );
[; ;i2c.h: 908: unsigned int EECurrentAddRead( unsigned char control );
[; ;i2c.h: 910: unsigned char EEPageWrite( unsigned char control,
[; ;i2c.h: 911: unsigned char address,
[; ;i2c.h: 912: unsigned char *wrptr );
[; ;i2c.h: 914: unsigned int EERandomRead( unsigned char control, unsigned char address );
[; ;i2c.h: 916: unsigned char EESequentialRead( unsigned char control,
[; ;i2c.h: 917: unsigned char address,
[; ;i2c.h: 918: unsigned char *rdptr,
[; ;i2c.h: 919: unsigned char length );
[; ;mwire.h: 295: void OpenMwire( unsigned char sync_mode );
[; ;mwire.h: 297: unsigned char ReadMwire( unsigned char high_byte,
[; ;mwire.h: 298: unsigned char low_byte );
[; ;mwire.h: 311: unsigned char WriteMwire( unsigned char data_out );
[; ;mwire.h: 324: void getsMwire( unsigned char *rdptr, unsigned char length );
[; ;portb.h: 126: void OpenPORTB( unsigned char config);
[; ;portb.h: 162: void OpenRB0INT( unsigned char config);
[; ;portb.h: 180: void OpenRB1INT( unsigned char config);
[; ;portb.h: 197: void OpenRB2INT( unsigned char config);
[; ;pwm.h: 85: union PWMDC
[; ;pwm.h: 86: {
[; ;pwm.h: 87: unsigned int lpwm;
[; ;pwm.h: 88: char bpwm[2];
[; ;pwm.h: 89: };
[; ;pwm.h: 416: void OpenPWM1 ( char period);
[; ;pwm.h: 417: void SetDCPWM1 ( unsigned int duty_cycle);
[; ;pwm.h: 426: void ClosePWM1 (void);
[; ;pwm.h: 434: void OpenPWM2 ( char period);
[; ;pwm.h: 435: void SetDCPWM2( unsigned int duty_cycle);
[; ;pwm.h: 441: void ClosePWM2 (void);
[; ;reset.h: 16: char isMCLR(void);
[; ;reset.h: 17: void StatusReset(void);
[; ;reset.h: 18: char isPOR(void);
[; ;reset.h: 19: char isWU(void);
[; ;reset.h: 22: char isBOR(void);
[; ;reset.h: 26: char isWDTTO(void);
[; ;reset.h: 27: char isWDTWU(void);
[; ;reset.h: 31: char isLVD(void);
[; ;rtcc.h: 509: void Open_RTCC(void);
[; ;rtcc.h: 510: void Close_RTCC(void);
[; ;rtcc.h: 511: unsigned char update_RTCC(void);
[; ;sw_i2c.h: 97: void SWStopI2C ( void );
[; ;sw_i2c.h: 98: void SWStartI2C ( void );
[; ;sw_i2c.h: 99: void SWRestartI2C ( void );
[; ;sw_i2c.h: 100: void SWStopI2C ( void );
[; ;sw_i2c.h: 102: signed char SWAckI2C( void );
[; ;sw_i2c.h: 103: signed char Clock_test( void );
[; ;sw_i2c.h: 104: unsigned int SWReadI2C( void );
[; ;sw_i2c.h: 105: signed char SWWriteI2C(  unsigned char data_out );
[; ;sw_i2c.h: 106: signed char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );
[; ;sw_i2c.h: 107: signed char SWPutsI2C(  unsigned char *wrptr );
[; ;sw_spi.h: 84: void OpenSWSPI(void);
[; ;sw_spi.h: 87: char WriteSWSPI( char output);
[; ;sw_spi.h: 90: void SetCSSWSPI(void);
[; ;sw_spi.h: 93: void ClearCSSWSPI(void);
[; ;sw_uart.h: 47: void OpenUART(void);
[; ;sw_uart.h: 49: unsigned char ReadUART(void);
[; ;sw_uart.h: 51: void WriteUART( unsigned char);
[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);
[; ;sw_uart.h: 55: void putsUART( char *);
[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);
[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);
[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);
[; ;timers.h: 36: union Timers
[; ;timers.h: 37: {
[; ;timers.h: 38: unsigned int lt;
[; ;timers.h: 39: char bt[2];
[; ;timers.h: 40: };
[; ;timers.h: 110: void OpenTimer0 ( unsigned char config);
[; ;timers.h: 111: void CloseTimer0 (void);
[; ;timers.h: 112: unsigned int ReadTimer0 (void);
[; ;timers.h: 113: void WriteTimer0 ( unsigned int timer0);
[; ;timers.h: 222: void OpenTimer1 ( unsigned char config);
[; ;timers.h: 223: void CloseTimer1 (void);
[; ;timers.h: 224: unsigned int ReadTimer1 (void);
[; ;timers.h: 225: void WriteTimer1 ( unsigned int timer1);
[; ;timers.h: 311: void OpenTimer2 ( unsigned char config);
[; ;timers.h: 312: void CloseTimer2 (void);
[; ;timers.h: 377: void OpenTimer3 ( unsigned char config);
[; ;timers.h: 378: void CloseTimer3 (void);
[; ;timers.h: 379: unsigned int ReadTimer3 (void);
[; ;timers.h: 380: void WriteTimer3 ( unsigned int timer3);
[; ;timers.h: 1141: void SetTmrCCPSrc( unsigned char );
[; ;usart.h: 392: union USART
[; ;usart.h: 393: {
[; ;usart.h: 394: unsigned char val;
[; ;usart.h: 395: struct
[; ;usart.h: 396: {
[; ;usart.h: 397: unsigned RX_NINE:1;
[; ;usart.h: 398: unsigned TX_NINE:1;
[; ;usart.h: 399: unsigned FRAME_ERROR:1;
[; ;usart.h: 400: unsigned OVERRUN_ERROR:1;
[; ;usart.h: 401: unsigned fill:4;
[; ;usart.h: 402: };
[; ;usart.h: 403: };
[; ;usart.h: 404: extern union USART USART_Status;
[; ;usart.h: 405: void OpenUSART ( unsigned char config, unsigned spbrg);
[; ;usart.h: 420: char ReadUSART (void);
[; ;usart.h: 421: void WriteUSART ( char data);
[; ;usart.h: 422: void getsUSART ( char *buffer, unsigned char len);
[; ;usart.h: 423: void putsUSART ( char *data);
[; ;usart.h: 424: void putrsUSART ( const  char *data);
[; ;xlcd.h: 79: void OpenXLCD( unsigned char);
[; ;xlcd.h: 84: void SetCGRamAddr( unsigned char);
[; ;xlcd.h: 89: void SetDDRamAddr( unsigned char);
[; ;xlcd.h: 94: unsigned char BusyXLCD(void);
[; ;xlcd.h: 99: unsigned char ReadAddrXLCD(void);
[; ;xlcd.h: 104: char ReadDataXLCD(void);
[; ;xlcd.h: 109: void WriteCmdXLCD( unsigned char);
[; ;xlcd.h: 114: void WriteDataXLCD( char);
[; ;xlcd.h: 124: void putsXLCD( char *);
[; ;xlcd.h: 129: void putrsXLCD(const char *);
[; ;xlcd.h: 132: extern void DelayFor18TCY(void);
[; ;xlcd.h: 133: extern void DelayPORXLCD(void);
[; ;xlcd.h: 134: extern void DelayXLCD(void);
[; ;pic18.h: 18: __attribute__((unsupported("The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash"))) void flash_write(const unsigned char *, unsigned int, far unsigned char *)
[; ;pic18.h: 60: extern unsigned char idloc_read(unsigned char reg_no);
[; ;pic18.h: 61: extern void idloc_write(unsigned char reg_no,unsigned char data);
[; ;pic18.h: 186: extern void _delay(unsigned long);
[; ;pic18.h: 188: extern void _delaywdt(unsigned long);
[; ;pic18.h: 190: extern void _delay3(unsigned char);
"78 C:\Users\LK\Desktop\exam\GraphicLCD_Test\test.c
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-> 50736 `ui
-> 58904 `ui
-> 50700 `ui
-> 34310 `ui
-> -> 1539 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"82
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 3852 `i `ui
-> -> 6540 `i `ui
-> -> 12492 `i `ui
-> -> 12492 `i `ui
-> -> 12492 `i `ui
-> -> 6540 `i `ui
-> -> 3852 `i `ui
-> -> 12 `i `ui
-> -> 0 `i `ui
-> -> 8188 `i `ui
-> -> 6156 `i `ui
-> -> 6156 `i `ui
-> -> 8188 `i `ui
-> -> 0 `i `ui
..
:U ..
"83
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 108 `i `ui
-> -> 13164 `i `ui
-> -> 13164 `i `ui
-> -> 13164 `i `ui
-> -> 13164 `i `ui
-> -> 16364 `i `ui
-> -> 13164 `i `ui
-> -> 13164 `i `ui
-> -> 13164 `i `ui
-> -> 13164 `i `ui
-> -> 13164 `i `ui
-> -> 7788 `i `ui
-> -> 108 `i `ui
-> -> 0 `i `ui
..
:U ..
"84
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 12 `i `ui
-> -> 8140 `i `ui
-> -> 12300 `i `ui
-> -> 12300 `i `ui
-> -> 12300 `i `ui
-> -> 12300 `i `ui
-> -> 12300 `i `ui
-> -> 12300 `i `ui
-> -> 12300 `i `ui
-> -> 12300 `i `ui
-> -> 12300 `i `ui
-> -> 8172 `i `ui
-> -> 12 `i `ui
-> -> 0 `i `ui
..
:U ..
"85
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 4092 `i `ui
-> -> 6144 `i `ui
-> -> 6144 `i `ui
-> -> 6144 `i `ui
-> -> 6144 `i `ui
-> -> 4092 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 16382 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"86
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 8184 `i `ui
-> -> 12 `i `ui
-> -> 12 `i `ui
-> -> 12 `i `ui
-> -> 12 `i `ui
-> -> 12 `i `ui
-> -> 12 `i `ui
-> -> 12 `i `ui
-> -> 24 `i `ui
-> -> 24 `i `ui
-> -> 16382 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"87
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 108 `i `ui
-> -> 15980 `i `ui
-> -> 876 `i `ui
-> -> 876 `i `ui
-> -> 876 `i `ui
-> -> 892 `i `ui
-> -> 7788 `i `ui
-> -> 12396 `i `ui
-> -> 12396 `i `ui
-> -> 12396 `i `ui
-> -> 12396 `i `ui
-> -> 8172 `i `ui
-> -> 108 `i `ui
-> -> 0 `i `ui
..
:U ..
"88
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 16364 `i `ui
-> -> 12 `i `ui
-> -> 6540 `i `ui
-> -> 6540 `i `ui
-> -> 6540 `i `ui
-> -> 3852 `i `ui
-> -> 16364 `i `ui
-> -> 12 `i `ui
-> -> 0 `i `ui
-> -> 8184 `i `ui
-> -> 12 `i `ui
-> -> 12 `i `ui
-> -> 12 `i `ui
-> -> 0 `i `ui
..
:U ..
"89
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 4080 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"90
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 992 `i `ui
-> -> 1584 `i `ui
-> -> 3096 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3096 `i `ui
-> -> 1584 `i `ui
-> -> 992 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"91
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 4032 `i `ui
-> -> 3168 `i `ui
-> -> 3120 `i `ui
-> -> 3096 `i `ui
-> -> 3096 `i `ui
-> -> 3096 `i `ui
-> -> 3096 `i `ui
-> -> 3096 `i `ui
-> -> 3120 `i `ui
-> -> 3168 `i `ui
-> -> 4032 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"92
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 7423 `i `ui
-> -> 7192 `i `ui
-> -> 13848 `i `ui
-> -> 13848 `i `ui
-> -> 13848 `i `ui
-> -> 25368 `i `ui
-> -> 25368 `i `ui
-> -> 32536 `i `ui
-> 49560 `ui
-> 49560 `ui
-> 49560 `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"93
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 32195 `i `ui
-> -> 30566 `i `ui
-> -> 26214 `i `ui
-> -> 26215 `i `ui
-> -> 26214 `i `ui
-> -> 26214 `i `ui
-> -> 26214 `i `ui
-> -> 26211 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"94
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> 57848 `ui
-> -> 13081 `i `ui
-> -> 13080 `i `ui
-> 62232 `ui
-> -> 793 `i `ui
-> -> 505 `i `ui
-> -> 12313 `i `ui
-> 58136 `ui
-> -> 496 `i `ui
-> -> 0 `i `ui
..
:U ..
"95
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 24 `i `ui
-> -> 120 `i `ui
-> -> 24 `i `ui
-> 63512 `ui
-> 35864 `ui
-> -> 3096 `i `ui
-> 64536 `ui
-> 35864 `ui
-> 35864 `ui
-> 35864 `ui
-> 65048 `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"96
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 30780 `i `ui
-> 52326 `ui
-> 34499 `ui
-> 34406 `ui
-> -> 3132 `i `ui
-> -> 6246 `i `ui
-> -> 12483 `i `ui
-> -> 24771 `i `ui
-> 49347 `ui
-> 32870 `ui
-> 65084 `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"97
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 1632 `i `ui
-> -> 1632 `i `ui
-> -> 960 `i `ui
-> -> 384 `i `ui
-> -> 960 `i `ui
-> -> 1632 `i `ui
-> -> 1632 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"98
-> -> 0 `i `ui
-> -> 780 `i `ui
-> -> 780 `i `ui
-> -> 1804 `i `ui
-> -> 1932 `i `ui
-> -> 3276 `i `ui
-> -> 6252 `i `ui
-> -> 12288 `i `ui
-> -> 8184 `i `ui
-> -> 12 `i `ui
-> -> 4088 `i `ui
-> -> 6144 `i `ui
-> -> 6144 `i `ui
-> -> 4092 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"99
-> -> 0 `i `ui
-> -> 192 `i `ui
-> -> 192 `i `ui
-> -> 1008 `i `ui
-> -> 7710 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 16382 `i `ui
-> -> 0 `i `ui
-> -> 6156 `i `ui
-> -> 6156 `i `ui
-> -> 8188 `i `ui
-> -> 6156 `i `ui
-> -> 4088 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"100
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 6168 `i `ui
-> -> 15420 `i `ui
-> -> 26214 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
..
]
[; ;test.c: 78: const unsigned int string[21][16] =
[; ;test.c: 79: {
[; ;test.c: 80: 0x1818,0x7c7c,0xfce6,0xfe66,0x7f27,0x7e67,0x3ce7,0x31e7,0x7e7,0x7e7,0x3e7,0x3e0,0x1e0,0x1ff,0xfc,0xf0,
[; ;test.c: 81: 0x00,0x00,0x60c,0x618,0x630,0x660,0x6c0,0x87c0,0x8760,0xc630,0xe618,0xc60c,0x8606,0x603,0x00,0x00,
[; ;test.c: 82: 0x00, 0x00, 0xf0c, 0x198c, 0x30cc, 0x30cc, 0x30cc, 0x198c, 0xf0c, 0x0c, 0x00, 0x1ffc, 0x180c, 0x180c, 0x1ffc, 0x00,
[; ;test.c: 83: 0x00, 0x00, 0x6c, 0x336c, 0x336c, 0x336c, 0x336c, 0x3fec, 0x336c, 0x336c, 0x336c, 0x336c, 0x336c, 0x1e6c, 0x6c, 0x00,
[; ;test.c: 84: 0x00, 0x00, 0x0c, 0x1fcc, 0x300c, 0x300c, 0x300c, 0x300c, 0x300c, 0x300c, 0x300c, 0x300c, 0x300c, 0x1fec, 0x0c, 0x00,
[; ;test.c: 85: 0x00, 0x00, 0x00, 0xffc, 0x1800, 0x1800, 0x1800, 0x1800, 0xffc, 0x00, 0x00, 0x00, 0x00, 0x3ffe, 0x00, 0x00,
[; ;test.c: 86: 0x00, 0x00, 0x00, 0x1ff8, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x18, 0x18, 0x3ffe, 0x00, 0x00,
[; ;test.c: 87: 0x00, 0x00, 0x6c, 0x3e6c, 0x36c, 0x36c, 0x36c, 0x37c, 0x1e6c, 0x306c, 0x306c, 0x306c, 0x306c, 0x1fec, 0x6c, 0x00,
[; ;test.c: 88: 0x00, 0x00, 0x3fec, 0x0c, 0x198c, 0x198c, 0x198c, 0xf0c, 0x3fec, 0x0c, 0x00, 0x1ff8, 0x0c, 0x0c, 0x0c, 0x00,
[; ;test.c: 89: 0x00, 0x00, 0x00, 0xc00, 0xc00, 0xc00, 0xc00, 0xc00, 0xc00, 0xc00, 0xc00, 0xc00, 0xc00, 0xff0, 0x00, 0x00,
[; ;test.c: 90: 0x00, 0x00, 0x00, 0x3e0, 0x630, 0xc18, 0xc00, 0xc00, 0xc00, 0xc00, 0xc00, 0xc18, 0x630, 0x3e0, 0x00, 0x00,
[; ;test.c: 91: 0x00, 0x00, 0x00, 0xfc0, 0xc60, 0xc30, 0xc18, 0xc18, 0xc18, 0xc18, 0xc18, 0xc30, 0xc60, 0xfc0, 0x00, 0x00,
[; ;test.c: 92: 0x00, 0x00, 0x00, 0x1cff, 0x1c18, 0x3618, 0x3618, 0x3618, 0x6318, 0x6318, 0x7f18, 0xc198, 0xc198, 0xc198, 0x00, 0x00,
[; ;test.c: 93: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7dc3, 0x7766, 0x6666, 0x6667, 0x6666, 0x6666, 0x6666, 0x6663, 0x00, 0x00,
[; ;test.c: 94: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe1f8, 0x3319, 0x3318, 0xf318, 0x319, 0x1f9, 0x3019, 0xe318, 0x1f0, 0x00,
[; ;test.c: 95: 0x00, 0x00, 0x00, 0x18, 0x78, 0x18, 0xf818, 0x8c18, 0xc18, 0xfc18, 0x8c18, 0x8c18, 0x8c18, 0xfe18, 0x00, 0x00,
[; ;test.c: 96: 0x00, 0x00, 0x00, 0x783c, 0xcc66, 0x86c3, 0x8666, 0xc3c, 0x1866, 0x30c3, 0x60c3, 0xc0c3, 0x8066, 0xfe3c, 0x00, 0x00,
[; ;test.c: 97: 0X00,0x00,0x00,0xc30,0xc30,0x660,0x660,0x3c0,0x180,0x3c0,0x660,0x660,0xc30,0xc30,0x00,0x00,
[; ;test.c: 98: 0x00, 0x30c, 0x30c, 0x70c, 0x78c, 0xccc, 0x186c, 0x3000, 0x1ff8, 0x0c, 0xff8, 0x1800, 0x1800, 0xffc, 0x00, 0x00,
[; ;test.c: 99: 0x00, 0xc0, 0xc0, 0x3f0, 0x1e1e, 0x00, 0x00, 0x3ffe, 0x00, 0x180c, 0x180c, 0x1ffc, 0x180c, 0xff8, 0x00, 0x00,
[; ;test.c: 100: 0x00, 0x00, 0x00, 0x1818, 0x3c3c, 0x6666, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[; ;test.c: 101: };
"102
[v F4059 `Cui ~T0 -> 16 `i t ]
[v _string_number `F4059 ~T0 -> 10 `i e ]
[i _string_number
:U ..
:U ..
"104
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 960 `i `ui
-> -> 1632 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 1632 `i `ui
-> -> 960 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"105
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 384 `i `ui
-> -> 1920 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"106
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 960 `i `ui
-> -> 1632 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 96 `i `ui
-> -> 192 `i `ui
-> -> 384 `i `ui
-> -> 768 `i `ui
-> -> 1536 `i `ui
-> -> 3072 `i `ui
-> -> 4080 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"107
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 960 `i `ui
-> -> 1632 `i `ui
-> -> 3120 `i `ui
-> -> 96 `i `ui
-> -> 960 `i `ui
-> -> 96 `i `ui
-> -> 48 `i `ui
-> -> 48 `i `ui
-> -> 3120 `i `ui
-> -> 1632 `i `ui
-> -> 960 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"108
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 448 `i `ui
-> -> 448 `i `ui
-> -> 960 `i `ui
-> -> 960 `i `ui
-> -> 1728 `i `ui
-> -> 1728 `i `ui
-> -> 3264 `i `ui
-> -> 4080 `i `ui
-> -> 192 `i `ui
-> -> 192 `i `ui
-> -> 192 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"109
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 4064 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 3072 `i `ui
-> -> 4032 `i `ui
-> -> 3168 `i `ui
-> -> 48 `i `ui
-> -> 48 `i `ui
-> -> 48 `i `ui
-> -> 3168 `i `ui
-> -> 1984 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"110
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 960 `i `ui
-> -> 1632 `i `ui
-> -> 3120 `i `ui
-> -> 3072 `i `ui
-> -> 4032 `i `ui
-> -> 3680 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 1632 `i `ui
-> -> 960 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"111
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 4080 `i `ui
-> -> 48 `i `ui
-> -> 96 `i `ui
-> -> 96 `i `ui
-> -> 192 `i `ui
-> -> 192 `i `ui
-> -> 192 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 384 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"112
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 960 `i `ui
-> -> 1632 `i `ui
-> -> 3120 `i `ui
-> -> 1632 `i `ui
-> -> 960 `i `ui
-> -> 1632 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 1632 `i `ui
-> -> 960 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
:U ..
"113
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
-> -> 960 `i `ui
-> -> 1632 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 3120 `i `ui
-> -> 1648 `i `ui
-> -> 1008 `i `ui
-> -> 48 `i `ui
-> -> 3120 `i `ui
-> -> 1632 `i `ui
-> -> 960 `i `ui
-> -> 0 `i `ui
-> -> 0 `i `ui
..
..
]
[; ;test.c: 102: const unsigned int string_number[10][16] =
[; ;test.c: 103: {
[; ;test.c: 104: 0x00, 0x00, 0x00, 0x3c0, 0x660, 0xc30, 0xc30, 0xc30, 0xc30, 0xc30, 0xc30, 0xc30, 0x660, 0x3c0, 0x00, 0x00,
[; ;test.c: 105: 0x00, 0x00, 0x00, 0x180, 0x780, 0x180, 0x180, 0x180, 0x180, 0x180, 0x180, 0x180, 0x180, 0x180, 0x00, 0x00,
[; ;test.c: 106: 0x00, 0x00, 0x00, 0x3c0, 0x660, 0xc30, 0xc30, 0x60, 0xc0, 0x180, 0x300, 0x600, 0xc00, 0xff0, 0x00, 0x00,
[; ;test.c: 107: 0x00, 0x00, 0x00, 0x3c0, 0x660, 0xc30, 0x60, 0x3c0, 0x60, 0x30, 0x30, 0xc30, 0x660, 0x3c0, 0x00, 0x00,
[; ;test.c: 108: 0x00, 0x00, 0x00, 0x1c0, 0x1c0, 0x3c0, 0x3c0, 0x6c0, 0x6c0, 0xcc0, 0xff0, 0xc0, 0xc0, 0xc0, 0x00, 0x00,
[; ;test.c: 109: 0x00, 0x00, 0x00, 0xfe0, 0xc00, 0xc00, 0xc00, 0xfc0, 0xc60, 0x30, 0x30, 0x30, 0xc60, 0x7c0, 0x00, 0x00,
[; ;test.c: 110: 0x00, 0x00, 0x00, 0x3c0, 0x660, 0xc30, 0xc00, 0xfc0, 0xe60, 0xc30, 0xc30, 0xc30, 0x660, 0x3c0, 0x00, 0x00,
[; ;test.c: 111: 0x00, 0x00, 0x00, 0xff0, 0x30, 0x60, 0x60, 0xc0, 0xc0, 0xc0, 0x180, 0x180, 0x180, 0x180, 0x00, 0x00,
[; ;test.c: 112: 0x00, 0x00, 0x00, 0x3c0, 0x660, 0xc30, 0x660, 0x3c0, 0x660, 0xc30, 0xc30, 0xc30, 0x660, 0x3c0, 0x00, 0x00,
[; ;test.c: 113: 0x00, 0x00, 0x00, 0x3c0, 0x660, 0xc30, 0xc30, 0xc30, 0x670, 0x3f0, 0x30, 0xc30, 0x660, 0x3c0, 0x00, 0x00,
[; ;test.c: 114: };
"118
[v _spi_send `(v ~T0 1 ef1`uc ]
{
[; ;test.c: 117: void spi_send(unsigned char data)
[; ;test.c: 118: {
[e :U _spi_send ]
[v _data `uc ~T0 1 r1 ]
[f ]
"119
[v _x `uc ~T0 1 a ]
[; ;test.c: 119: unsigned char x;
[; ;test.c: 120: SSPBUF = data;
"120
[e = _SSPBUF _data ]
[; ;test.c: 121: while (!SSPIF);
"121
[e $U 525  ]
[e :U 526 ]
[e :U 525 ]
[e $ ! _SSPIF 526  ]
[e :U 527 ]
[; ;test.c: 122: }
"122
[e :UE 524 ]
}
"124
[v _lcd_instruction `(v ~T0 1 ef1`uc ]
{
[; ;test.c: 123: void lcd_instruction(unsigned char ins)
[; ;test.c: 124: {
[e :U _lcd_instruction ]
[v _ins `uc ~T0 1 r1 ]
[f ]
[; ;test.c: 125: spi_send(0b11111000);
"125
[e ( _spi_send (1 -> -> 248 `i `uc ]
[; ;test.c: 126: spi_send(ins & 0xf0);
"126
[e ( _spi_send (1 -> & -> _ins `i -> 240 `i `uc ]
[; ;test.c: 127: spi_send(ins << 4);
"127
[e ( _spi_send (1 -> << -> _ins `i -> 4 `i `uc ]
[; ;test.c: 128: _delay((unsigned long)((72)*(16000000/4000000.0)));
"128
[e ( __delay (1 -> * -> -> 72 `i `d / -> -> 16000000 `l `d .4000000.0 `ul ]
[; ;test.c: 129: }
"129
[e :UE 528 ]
}
"132
[v _lcd_data `(v ~T0 1 ef1`uc ]
{
[; ;test.c: 131: void lcd_data(unsigned char data)
[; ;test.c: 132: {
[e :U _lcd_data ]
[v _data `uc ~T0 1 r1 ]
[f ]
[; ;test.c: 133: spi_send(0b11111010);
"133
[e ( _spi_send (1 -> -> 250 `i `uc ]
[; ;test.c: 134: spi_send(data & 0xf0);
"134
[e ( _spi_send (1 -> & -> _data `i -> 240 `i `uc ]
[; ;test.c: 135: spi_send(data << 4);
"135
[e ( _spi_send (1 -> << -> _data `i -> 4 `i `uc ]
[; ;test.c: 136: _delay((unsigned long)((72)*(16000000/4000000.0)));
"136
[e ( __delay (1 -> * -> -> 72 `i `d / -> -> 16000000 `l `d .4000000.0 `ul ]
[; ;test.c: 137: }
"137
[e :UE 529 ]
}
"140
[v _lcd_set_cursor `(v ~T0 1 ef2`uc`uc ]
{
[; ;test.c: 139: void lcd_set_cursor(unsigned char line, unsigned char col)
[; ;test.c: 140: {
[e :U _lcd_set_cursor ]
[v _line `uc ~T0 1 r1 ]
[v _col `uc ~T0 1 r2 ]
[f ]
"143
[v _d `uc ~T0 1 a ]
[; ;test.c: 143: unsigned char d = 0x80 + col;
[e = _d -> + -> 128 `i -> _col `i `uc ]
[; ;test.c: 144: if (line & 1)
"144
[e $ ! != & -> _line `i -> 1 `i -> 0 `i 531  ]
[; ;test.c: 145: {
"145
{
[; ;test.c: 146: d |= 0x10;
"146
[e =| _d -> -> 16 `i `uc ]
"147
}
[e :U 531 ]
[; ;test.c: 147: }
[; ;test.c: 148: if (line & 2)
"148
[e $ ! != & -> _line `i -> 2 `i -> 0 `i 532  ]
[; ;test.c: 149: {
"149
{
[; ;test.c: 150: d |= 0x8;
"150
[e =| _d -> -> 8 `i `uc ]
"151
}
[e :U 532 ]
[; ;test.c: 151: }
[; ;test.c: 152: lcd_instruction(d);
"152
[e ( _lcd_instruction (1 _d ]
[; ;test.c: 153: }
"153
[e :UE 530 ]
}
"157
[v _lcd_clear `(v ~T0 1 ef ]
{
[; ;test.c: 156: void lcd_clear()
[; ;test.c: 157: {
[e :U _lcd_clear ]
[f ]
[; ;test.c: 158: lcd_instruction(0b00000001);
"158
[e ( _lcd_instruction (1 -> -> 1 `i `uc ]
[; ;test.c: 159: _delay((unsigned long)((2)*(16000000/4000.0)));
"159
[e ( __delay (1 -> * -> -> 2 `i `d / -> -> 16000000 `l `d .4000.0 `ul ]
[; ;test.c: 160: }
"160
[e :UE 533 ]
}
"164
[v _lcd_reset `(v ~T0 1 ef ]
{
[; ;test.c: 163: void lcd_reset()
[; ;test.c: 164: {
[e :U _lcd_reset ]
[f ]
[; ;test.c: 166: PORTB &= ~0x01;
"166
[e =& _PORTB -> ~ -> 1 `i `uc ]
[; ;test.c: 167: _delay((unsigned long)((1)*(16000000/4000.0)));
"167
[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 16000000 `l `d .4000.0 `ul ]
[; ;test.c: 168: PORTB |= 0x01;
"168
[e =| _PORTB -> -> 1 `i `uc ]
[; ;test.c: 169: _delay((unsigned long)((10)*(16000000/4000.0)));
"169
[e ( __delay (1 -> * -> -> 10 `i `d / -> -> 16000000 `l `d .4000.0 `ul ]
[; ;test.c: 170: lcd_instruction(0b00110000);
"170
[e ( _lcd_instruction (1 -> -> 48 `i `uc ]
[; ;test.c: 171: lcd_instruction(0b00110000);
"171
[e ( _lcd_instruction (1 -> -> 48 `i `uc ]
[; ;test.c: 172: lcd_instruction(0b00001100);
"172
[e ( _lcd_instruction (1 -> -> 12 `i `uc ]
[; ;test.c: 173: lcd_clear();
"173
[e ( _lcd_clear ..  ]
[; ;test.c: 174: _delay((unsigned long)((10)*(16000000/4000.0)));
"174
[e ( __delay (1 -> * -> -> 10 `i `d / -> -> 16000000 `l `d .4000.0 `ul ]
[; ;test.c: 175: lcd_instruction(0b00000110);
"175
[e ( _lcd_instruction (1 -> -> 6 `i `uc ]
[; ;test.c: 176: }
"176
[e :UE 534 ]
}
"178
[v _draw_data `(v ~T0 1 ef3`uc`uc`ui ]
{
[; ;test.c: 177: void draw_data(unsigned char x, unsigned char y, unsigned int data)
[; ;test.c: 178: {
[e :U _draw_data ]
[v _x `uc ~T0 1 r1 ]
[v _y `uc ~T0 1 r2 ]
[v _data `ui ~T0 1 r3 ]
[f ]
[; ;test.c: 179: lcd_instruction(0X80 | (y & 0x3F));
"179
[e ( _lcd_instruction (1 -> | -> 128 `i & -> _y `i -> 63 `i `uc ]
[; ;test.c: 180: lcd_instruction(0X80 | (x & 0x0F));
"180
[e ( _lcd_instruction (1 -> | -> 128 `i & -> _x `i -> 15 `i `uc ]
[; ;test.c: 181: lcd_data((data >> 8) & 0xFF);
"181
[e ( _lcd_data (1 -> & >> _data -> 8 `i -> -> 255 `i `ui `uc ]
[; ;test.c: 182: lcd_data(data & 0xFF);
"182
[e ( _lcd_data (1 -> & _data -> -> 255 `i `ui `uc ]
[; ;test.c: 183: }
"183
[e :UE 535 ]
}
"185
[v _lcd_set_graphic_mode `(v ~T0 1 ef ]
{
[; ;test.c: 184: void lcd_set_graphic_mode(void)
[; ;test.c: 185: {
[e :U _lcd_set_graphic_mode ]
[f ]
[; ;test.c: 186: lcd_instruction(0X01);
"186
[e ( _lcd_instruction (1 -> -> 1 `i `uc ]
[; ;test.c: 187: _delay((unsigned long)((10)*(16000000/4000.0)));
"187
[e ( __delay (1 -> * -> -> 10 `i `d / -> -> 16000000 `l `d .4000.0 `ul ]
[; ;test.c: 189: lcd_instruction(0X20 | 0X04 | 0X02);
"189
[e ( _lcd_instruction (1 -> | | -> 32 `i -> 4 `i -> 2 `i `uc ]
[; ;test.c: 190: lcd_instruction(0X02);
"190
[e ( _lcd_instruction (1 -> -> 2 `i `uc ]
[; ;test.c: 191: }
"191
[e :UE 536 ]
}
"193
[v _clear_lcd `(v ~T0 1 ef ]
{
[; ;test.c: 192: void clear_lcd()
[; ;test.c: 193: {
[e :U _clear_lcd ]
[f ]
"194
[v _x `i ~T0 1 a ]
[v _y `i ~T0 1 a ]
[v _i `i ~T0 1 a ]
[v _j `i ~T0 1 a ]
[; ;test.c: 194: int x, y, i, j = 0;
[e = _j -> 0 `i ]
[; ;test.c: 195: for (i = 0;i < 64;i++)
"195
{
[e = _i -> 0 `i ]
[e $ < _i -> 64 `i 538  ]
[e $U 539  ]
"196
[e :U 538 ]
[; ;test.c: 196: {
{
[; ;test.c: 197: for (j = 0;j < 16;j++)
"197
{
[e = _j -> 0 `i ]
[e $ < _j -> 16 `i 541  ]
[e $U 542  ]
"198
[e :U 541 ]
[; ;test.c: 198: {
{
[; ;test.c: 199: draw_data(j, i, 0);
"199
[e ( _draw_data (3 , , -> _j `uc -> _i `uc -> -> 0 `i `ui ]
"200
}
"197
[e ++ _j -> 1 `i ]
[e $ < _j -> 16 `i 541  ]
[e :U 542 ]
"200
}
"201
}
"195
[e ++ _i -> 1 `i ]
[e $ < _i -> 64 `i 538  ]
[e :U 539 ]
"201
}
[; ;test.c: 200: }
[; ;test.c: 201: }
[; ;test.c: 202: }
"202
[e :UE 537 ]
}
"203
[v _x `ui ~T0 1 e ]
[v _y `ui ~T0 1 e ]
[i _y
-> -> 0 `i `ui
]
[; ;test.c: 203: unsigned int x, y = 0;
"205
[v _page_0 `(v ~T0 1 ef ]
{
[; ;test.c: 204: void page_0()
[; ;test.c: 205: {
[e :U _page_0 ]
[f ]
[; ;test.c: 206: x = 0;
"206
[e = _x -> -> 0 `i `ui ]
[; ;test.c: 207: y = 0;
"207
[e = _y -> -> 0 `i `ui ]
[; ;test.c: 208: }
"208
[e :UE 544 ]
}
"210
[v _page_1 `(v ~T0 1 ef ]
{
[; ;test.c: 209: void page_1()
[; ;test.c: 210: {
[e :U _page_1 ]
[f ]
[; ;test.c: 211: x = 0;
"211
[e = _x -> -> 0 `i `ui ]
[; ;test.c: 212: y = 16;
"212
[e = _y -> -> 16 `i `ui ]
[; ;test.c: 213: }
"213
[e :UE 545 ]
}
"215
[v _page_2 `(v ~T0 1 ef ]
{
[; ;test.c: 214: void page_2()
[; ;test.c: 215: {
[e :U _page_2 ]
[f ]
[; ;test.c: 216: x = 8;
"216
[e = _x -> -> 8 `i `ui ]
[; ;test.c: 217: y = 0;
"217
[e = _y -> -> 0 `i `ui ]
[; ;test.c: 218: }
"218
[e :UE 546 ]
}
"220
[v _page_3 `(v ~T0 1 ef ]
{
[; ;test.c: 219: void page_3()
[; ;test.c: 220: {
[e :U _page_3 ]
[f ]
[; ;test.c: 221: x = 8;
"221
[e = _x -> -> 8 `i `ui ]
[; ;test.c: 222: y = 16;
"222
[e = _y -> -> 16 `i `ui ]
[; ;test.c: 223: }
"223
[e :UE 547 ]
}
"225
[v _number_display `(v ~T0 1 ef3`uc`uc`i ]
{
[; ;test.c: 224: void number_display(unsigned char x_axis, unsigned char y_axis, int number)
[; ;test.c: 225: {
[e :U _number_display ]
[v _x_axis `uc ~T0 1 r1 ]
[v _y_axis `uc ~T0 1 r2 ]
[v _number `i ~T0 1 r3 ]
[f ]
"226
[v _i `Vui ~T0 1 a ]
[v _j `Vui ~T0 1 a ]
[v _k `Vui ~T0 1 a ]
[v _l `Vui ~T0 1 a ]
[; ;test.c: 226: volatile unsigned int i, j, k, l = 0;
[e = _l -> -> 0 `i `ui ]
"227
[v _seq `uc ~T0 1 a ]
[; ;test.c: 227: unsigned char seq = 0;
[e = _seq -> -> 0 `i `uc ]
"228
[v _m `i ~T0 1 a ]
[; ;test.c: 228: int m = 0;
[e = _m -> 0 `i ]
[; ;test.c: 229: i = (number % 10000) / 1000;
"229
[e = _i -> / % _number -> 10000 `i -> 1000 `i `ui ]
[; ;test.c: 230: j = (number % 1000) / 100;
"230
[e = _j -> / % _number -> 1000 `i -> 100 `i `ui ]
[; ;test.c: 231: k = (number % 100) / 10;
"231
[e = _k -> / % _number -> 100 `i -> 10 `i `ui ]
[; ;test.c: 232: l = (number % 10);
"232
[e = _l -> % _number -> 10 `i `ui ]
[; ;test.c: 233: switch (y_axis)
"233
[e $U 550  ]
[; ;test.c: 234: {
"234
{
[; ;test.c: 235: case 0:
"235
[e :U 551 ]
[; ;test.c: 236: page_0();
"236
[e ( _page_0 ..  ]
[; ;test.c: 237: break;
"237
[e $U 549  ]
[; ;test.c: 238: case 1:
"238
[e :U 552 ]
[; ;test.c: 239: page_1();
"239
[e ( _page_1 ..  ]
[; ;test.c: 240: break;
"240
[e $U 549  ]
[; ;test.c: 241: case 2:
"241
[e :U 553 ]
[; ;test.c: 242: page_2();
"242
[e ( _page_2 ..  ]
[; ;test.c: 243: break;
"243
[e $U 549  ]
[; ;test.c: 244: case 3:
"244
[e :U 554 ]
[; ;test.c: 245: page_3();
"245
[e ( _page_3 ..  ]
[; ;test.c: 246: break;
"246
[e $U 549  ]
"247
}
[; ;test.c: 247: }
[e $U 549  ]
"233
[e :U 550 ]
[e [\ _y_axis , $ -> -> 0 `i `uc 551
 , $ -> -> 1 `i `uc 552
 , $ -> -> 2 `i `uc 553
 , $ -> -> 3 `i `uc 554
 549 ]
"247
[e :U 549 ]
[; ;test.c: 248: if (i == 0)
"248
[e $ ! == _i -> -> 0 `i `ui 555  ]
[; ;test.c: 249: {
"249
{
[; ;test.c: 250: seq = 0;
"250
[e = _seq -> -> 0 `i `uc ]
"251
}
[; ;test.c: 251: }
[e $U 556  ]
"252
[e :U 555 ]
[; ;test.c: 252: else
[; ;test.c: 253: {
"253
{
[; ;test.c: 254: for (m = 0;m < 16;m++)
"254
{
[e = _m -> 0 `i ]
[e $ < _m -> 16 `i 557  ]
[e $U 558  ]
"255
[e :U 557 ]
[; ;test.c: 255: {
{
[; ;test.c: 256: draw_data((x_axis + x), (m + y), string_number[i][m]);
"256
[e ( _draw_data (3 , , -> + -> _x_axis `ui _x `uc -> + -> _m `ui _y `uc *U + &U *U + &U _string_number * -> _i `ux -> * -> # *U &U *U &U _string_number `ui -> -> 16 `i `ui `ux * -> -> _m `ui `ux -> -> # *U &U *U + &U _string_number * -> _i `ux -> * -> # *U &U *U &U _string_number `ui -> -> 16 `i `ui `ux `ui `ux ]
"257
}
"254
[e ++ _m -> 1 `i ]
[e $ < _m -> 16 `i 557  ]
[e :U 558 ]
"257
}
[; ;test.c: 257: }
[; ;test.c: 258: seq++;
"258
[e ++ _seq -> -> 1 `i `uc ]
"259
}
[e :U 556 ]
[; ;test.c: 259: }
[; ;test.c: 260: if (i == 0 && j == 0)
"260
[e $ ! && == _i -> -> 0 `i `ui == _j -> -> 0 `i `ui 560  ]
[; ;test.c: 261: {
"261
{
[; ;test.c: 262: seq = 0;
"262
[e = _seq -> -> 0 `i `uc ]
"263
}
[; ;test.c: 263: }
[e $U 561  ]
"264
[e :U 560 ]
[; ;test.c: 264: else
[; ;test.c: 265: {
"265
{
[; ;test.c: 266: for (m = 0;m < 16;m++)
"266
{
[e = _m -> 0 `i ]
[e $ < _m -> 16 `i 562  ]
[e $U 563  ]
"267
[e :U 562 ]
[; ;test.c: 267: {
{
[; ;test.c: 268: draw_data((x_axis + x + seq), (m + y), string_number[j][m]);
"268
[e ( _draw_data (3 , , -> + + -> _x_axis `ui _x -> _seq `ui `uc -> + -> _m `ui _y `uc *U + &U *U + &U _string_number * -> _j `ux -> * -> # *U &U *U &U _string_number `ui -> -> 16 `i `ui `ux * -> -> _m `ui `ux -> -> # *U &U *U + &U _string_number * -> _j `ux -> * -> # *U &U *U &U _string_number `ui -> -> 16 `i `ui `ux `ui `ux ]
"269
}
"266
[e ++ _m -> 1 `i ]
[e $ < _m -> 16 `i 562  ]
[e :U 563 ]
"269
}
[; ;test.c: 269: }
[; ;test.c: 270: seq++;
"270
[e ++ _seq -> -> 1 `i `uc ]
"271
}
[e :U 561 ]
[; ;test.c: 271: }
[; ;test.c: 272: if (i == 0 && j == 0 && k == 0)
"272
[e $ ! && && == _i -> -> 0 `i `ui == _j -> -> 0 `i `ui == _k -> -> 0 `i `ui 565  ]
[; ;test.c: 273: {
"273
{
[; ;test.c: 274: seq = 0;
"274
[e = _seq -> -> 0 `i `uc ]
"275
}
[; ;test.c: 275: }
[e $U 566  ]
"276
[e :U 565 ]
[; ;test.c: 276: else
[; ;test.c: 277: {
"277
{
[; ;test.c: 278: for (m = 0;m < 16;m++)
"278
{
[e = _m -> 0 `i ]
[e $ < _m -> 16 `i 567  ]
[e $U 568  ]
"279
[e :U 567 ]
[; ;test.c: 279: {
{
[; ;test.c: 280: draw_data((x_axis + x + seq), (m + y), string_number[k][m]);
"280
[e ( _draw_data (3 , , -> + + -> _x_axis `ui _x -> _seq `ui `uc -> + -> _m `ui _y `uc *U + &U *U + &U _string_number * -> _k `ux -> * -> # *U &U *U &U _string_number `ui -> -> 16 `i `ui `ux * -> -> _m `ui `ux -> -> # *U &U *U + &U _string_number * -> _k `ux -> * -> # *U &U *U &U _string_number `ui -> -> 16 `i `ui `ux `ui `ux ]
"281
}
"278
[e ++ _m -> 1 `i ]
[e $ < _m -> 16 `i 567  ]
[e :U 568 ]
"281
}
[; ;test.c: 281: }
[; ;test.c: 282: seq++;
"282
[e ++ _seq -> -> 1 `i `uc ]
"283
}
[e :U 566 ]
[; ;test.c: 283: }
[; ;test.c: 284: for (m = 0;m < 16;m++)
"284
{
[e = _m -> 0 `i ]
[e $ < _m -> 16 `i 570  ]
[e $U 571  ]
"285
[e :U 570 ]
[; ;test.c: 285: {
{
[; ;test.c: 286: draw_data((x_axis + x + seq), (m + y), string_number[l][m]);
"286
[e ( _draw_data (3 , , -> + + -> _x_axis `ui _x -> _seq `ui `uc -> + -> _m `ui _y `uc *U + &U *U + &U _string_number * -> _l `ux -> * -> # *U &U *U &U _string_number `ui -> -> 16 `i `ui `ux * -> -> _m `ui `ux -> -> # *U &U *U + &U _string_number * -> _l `ux -> * -> # *U &U *U &U _string_number `ui -> -> 16 `i `ui `ux `ui `ux ]
"287
}
"284
[e ++ _m -> 1 `i ]
[e $ < _m -> 16 `i 570  ]
[e :U 571 ]
"287
}
[; ;test.c: 287: }
[; ;test.c: 289: }
"289
[e :UE 548 ]
}
"292
[v _hangulDisplay `(v ~T0 1 ef3`uc`uc`uc ]
{
[; ;test.c: 291: void hangulDisplay(unsigned char x_axis, unsigned char y_axis, unsigned char string_sel)
[; ;test.c: 292: {
[e :U _hangulDisplay ]
[v _x_axis `uc ~T0 1 r1 ]
[v _y_axis `uc ~T0 1 r2 ]
[v _string_sel `uc ~T0 1 r3 ]
[f ]
"293
[v _j `i ~T0 1 a ]
[; ;test.c: 293: int j = 0;
[e = _j -> 0 `i ]
[; ;test.c: 294: switch (y_axis)
"294
[e $U 575  ]
[; ;test.c: 295: {
"295
{
[; ;test.c: 296: case 0:
"296
[e :U 576 ]
[; ;test.c: 297: page_0();
"297
[e ( _page_0 ..  ]
[; ;test.c: 298: break;
"298
[e $U 574  ]
[; ;test.c: 299: case 1:
"299
[e :U 577 ]
[; ;test.c: 300: page_1();
"300
[e ( _page_1 ..  ]
[; ;test.c: 301: break;
"301
[e $U 574  ]
[; ;test.c: 302: case 2:
"302
[e :U 578 ]
[; ;test.c: 303: page_2();
"303
[e ( _page_2 ..  ]
[; ;test.c: 304: break;
"304
[e $U 574  ]
[; ;test.c: 305: case 3:
"305
[e :U 579 ]
[; ;test.c: 306: page_3();
"306
[e ( _page_3 ..  ]
[; ;test.c: 307: break;
"307
[e $U 574  ]
"308
}
[; ;test.c: 308: }
[e $U 574  ]
"294
[e :U 575 ]
[e [\ _y_axis , $ -> -> 0 `i `uc 576
 , $ -> -> 1 `i `uc 577
 , $ -> -> 2 `i `uc 578
 , $ -> -> 3 `i `uc 579
 574 ]
"308
[e :U 574 ]
[; ;test.c: 309: if (string_sel == 99)
"309
[e $ ! == -> _string_sel `i -> 99 `i 580  ]
[; ;test.c: 310: {
"310
{
[; ;test.c: 311: for (j = 0;j < 16;j++)
"311
{
[e = _j -> 0 `i ]
[e $ < _j -> 16 `i 581  ]
[e $U 582  ]
"312
[e :U 581 ]
[; ;test.c: 312: {
{
[; ;test.c: 313: draw_data((x_axis + x), (j + y), 0);
"313
[e ( _draw_data (3 , , -> + -> _x_axis `ui _x `uc -> + -> _j `ui _y `uc -> -> 0 `i `ui ]
"314
}
"311
[e ++ _j -> 1 `i ]
[e $ < _j -> 16 `i 581  ]
[e :U 582 ]
"314
}
"316
}
[; ;test.c: 314: }
[; ;test.c: 316: }
[e $U 584  ]
"317
[e :U 580 ]
[; ;test.c: 317: else
[; ;test.c: 318: {
"318
{
[; ;test.c: 319: for (j = 0;j < 16;j++)
"319
{
[e = _j -> 0 `i ]
[e $ < _j -> 16 `i 585  ]
[e $U 586  ]
"320
[e :U 585 ]
[; ;test.c: 320: {
{
[; ;test.c: 321: draw_data((x_axis + x), (j + y), string[string_sel][j]);
"321
[e ( _draw_data (3 , , -> + -> _x_axis `ui _x `uc -> + -> _j `ui _y `uc *U + &U *U + &U _string * -> _string_sel `ux -> * -> # *U &U *U &U _string `ui -> -> 16 `i `ui `ux * -> -> _j `ui `ux -> -> # *U &U *U + &U _string * -> _string_sel `ux -> * -> # *U &U *U &U _string `ui -> -> 16 `i `ui `ux `ui `ux ]
"322
}
"319
[e ++ _j -> 1 `i ]
[e $ < _j -> 16 `i 585  ]
[e :U 586 ]
"322
}
"323
}
[e :U 584 ]
[; ;test.c: 322: }
[; ;test.c: 323: }
[; ;test.c: 325: }
"325
[e :UE 573 ]
}
"327
[v _First_Line `(v ~T0 1 ef ]
{
[; ;test.c: 326: void First_Line()
[; ;test.c: 327: {
[e :U _First_Line ]
[f ]
[; ;test.c: 328: hangulDisplay(0, 0, 99);
"328
[e ( _hangulDisplay (3 , , -> -> 0 `i `uc -> -> 0 `i `uc -> -> 99 `i `uc ]
[; ;test.c: 329: hangulDisplay(1, 0, 0);
"329
[e ( _hangulDisplay (3 , , -> -> 1 `i `uc -> -> 0 `i `uc -> -> 0 `i `uc ]
[; ;test.c: 330: hangulDisplay(2, 0, 1);
"330
[e ( _hangulDisplay (3 , , -> -> 2 `i `uc -> -> 0 `i `uc -> -> 1 `i `uc ]
[; ;test.c: 331: hangulDisplay(3, 0, 2);
"331
[e ( _hangulDisplay (3 , , -> -> 3 `i `uc -> -> 0 `i `uc -> -> 2 `i `uc ]
[; ;test.c: 332: hangulDisplay(4, 0, 3);
"332
[e ( _hangulDisplay (3 , , -> -> 4 `i `uc -> -> 0 `i `uc -> -> 3 `i `uc ]
[; ;test.c: 333: hangulDisplay(5, 0, 4);
"333
[e ( _hangulDisplay (3 , , -> -> 5 `i `uc -> -> 0 `i `uc -> -> 4 `i `uc ]
[; ;test.c: 334: hangulDisplay(6, 0, 5);
"334
[e ( _hangulDisplay (3 , , -> -> 6 `i `uc -> -> 0 `i `uc -> -> 5 `i `uc ]
[; ;test.c: 335: hangulDisplay(7, 0, 99);
"335
[e ( _hangulDisplay (3 , , -> -> 7 `i `uc -> -> 0 `i `uc -> -> 99 `i `uc ]
[; ;test.c: 336: }
"336
[e :UE 588 ]
}
"338
[v _Second_Line `(v ~T0 1 ef ]
{
[; ;test.c: 337: void Second_Line()
[; ;test.c: 338: {
[e :U _Second_Line ]
[f ]
[; ;test.c: 339: hangulDisplay(0, 1, 99);
"339
[e ( _hangulDisplay (3 , , -> -> 0 `i `uc -> -> 1 `i `uc -> -> 99 `i `uc ]
[; ;test.c: 340: number_display(1, 1, 128);
"340
[e ( _number_display (3 , , -> -> 1 `i `uc -> -> 1 `i `uc -> 128 `i ]
[; ;test.c: 341: hangulDisplay(4, 1, 17);
"341
[e ( _hangulDisplay (3 , , -> -> 4 `i `uc -> -> 1 `i `uc -> -> 17 `i `uc ]
[; ;test.c: 342: number_display(5, 1, 64);
"342
[e ( _number_display (3 , , -> -> 5 `i `uc -> -> 1 `i `uc -> 64 `i ]
[; ;test.c: 343: }
"343
[e :UE 589 ]
}
"345
[v _Third_Line `(v ~T0 1 ef ]
{
[; ;test.c: 344: void Third_Line()
[; ;test.c: 345: {
[e :U _Third_Line ]
[f ]
[; ;test.c: 347: hangulDisplay(0, 2, 99);
"347
[e ( _hangulDisplay (3 , , -> -> 0 `i `uc -> -> 2 `i `uc -> -> 99 `i `uc ]
[; ;test.c: 348: hangulDisplay(1, 2, 6);
"348
[e ( _hangulDisplay (3 , , -> -> 1 `i `uc -> -> 2 `i `uc -> -> 6 `i `uc ]
[; ;test.c: 349: hangulDisplay(2, 2, 7);
"349
[e ( _hangulDisplay (3 , , -> -> 2 `i `uc -> -> 2 `i `uc -> -> 7 `i `uc ]
[; ;test.c: 350: hangulDisplay(3, 2, 8);
"350
[e ( _hangulDisplay (3 , , -> -> 3 `i `uc -> -> 2 `i `uc -> -> 8 `i `uc ]
[; ;test.c: 351: hangulDisplay(4, 2, 9);
"351
[e ( _hangulDisplay (3 , , -> -> 4 `i `uc -> -> 2 `i `uc -> -> 9 `i `uc ]
[; ;test.c: 352: hangulDisplay(5, 2, 10);
"352
[e ( _hangulDisplay (3 , , -> -> 5 `i `uc -> -> 2 `i `uc -> -> 10 `i `uc ]
[; ;test.c: 353: hangulDisplay(6, 2, 11);
"353
[e ( _hangulDisplay (3 , , -> -> 6 `i `uc -> -> 2 `i `uc -> -> 11 `i `uc ]
[; ;test.c: 354: hangulDisplay(7, 2, 99);
"354
[e ( _hangulDisplay (3 , , -> -> 7 `i `uc -> -> 2 `i `uc -> -> 99 `i `uc ]
[; ;test.c: 355: }
"355
[e :UE 590 ]
}
"357
[v _Fourth_Line `(v ~T0 1 ef ]
{
[; ;test.c: 356: void Fourth_Line()
[; ;test.c: 357: {
[e :U _Fourth_Line ]
[f ]
[; ;test.c: 358: hangulDisplay(0, 3, 12);
"358
[e ( _hangulDisplay (3 , , -> -> 0 `i `uc -> -> 3 `i `uc -> -> 12 `i `uc ]
[; ;test.c: 359: hangulDisplay(1, 3, 13);
"359
[e ( _hangulDisplay (3 , , -> -> 1 `i `uc -> -> 3 `i `uc -> -> 13 `i `uc ]
[; ;test.c: 360: hangulDisplay(2, 3, 14);
"360
[e ( _hangulDisplay (3 , , -> -> 2 `i `uc -> -> 3 `i `uc -> -> 14 `i `uc ]
[; ;test.c: 361: hangulDisplay(3, 3, 15);
"361
[e ( _hangulDisplay (3 , , -> -> 3 `i `uc -> -> 3 `i `uc -> -> 15 `i `uc ]
[; ;test.c: 362: hangulDisplay(4, 3, 16);
"362
[e ( _hangulDisplay (3 , , -> -> 4 `i `uc -> -> 3 `i `uc -> -> 16 `i `uc ]
[; ;test.c: 363: hangulDisplay(5, 3, 18);
"363
[e ( _hangulDisplay (3 , , -> -> 5 `i `uc -> -> 3 `i `uc -> -> 18 `i `uc ]
[; ;test.c: 364: hangulDisplay(6, 3, 19);
"364
[e ( _hangulDisplay (3 , , -> -> 6 `i `uc -> -> 3 `i `uc -> -> 19 `i `uc ]
[; ;test.c: 365: hangulDisplay(7, 3, 20);
"365
[e ( _hangulDisplay (3 , , -> -> 7 `i `uc -> -> 3 `i `uc -> -> 20 `i `uc ]
[; ;test.c: 366: }
"366
[e :UE 591 ]
}
"368
[v _init_SPI `(v ~T0 1 ef ]
{
[; ;test.c: 367: void init_SPI(void)
[; ;test.c: 368: {
[e :U _init_SPI ]
[f ]
[; ;test.c: 369: TRISC = 0X00;
"369
[e = _TRISC -> -> 0 `i `uc ]
[; ;test.c: 370: TRISB = 0X00;
"370
[e = _TRISB -> -> 0 `i `uc ]
[; ;test.c: 371: SSPSTAT = 0b01000000;
"371
[e = _SSPSTAT -> -> 64 `i `uc ]
[; ;test.c: 372: SSPCON1 = 0b00110000;
"372
[e = _SSPCON1 -> -> 48 `i `uc ]
[; ;test.c: 373: SSPIE = 1;
"373
[e = _SSPIE -> -> 1 `i `b ]
[; ;test.c: 374: SSPIF = 0;
"374
[e = _SSPIF -> -> 0 `i `b ]
[; ;test.c: 375: }
"375
[e :UE 592 ]
}
"377
[v _main `(v ~T0 1 ef ]
{
[; ;test.c: 376: void main()
[; ;test.c: 377: {
[e :U _main ]
[f ]
[; ;test.c: 378: init_SPI();
"378
[e ( _init_SPI ..  ]
[; ;test.c: 379: lcd_reset();
"379
[e ( _lcd_reset ..  ]
[; ;test.c: 380: lcd_set_graphic_mode();
"380
[e ( _lcd_set_graphic_mode ..  ]
[; ;test.c: 381: clear_lcd();
"381
[e ( _clear_lcd ..  ]
[; ;test.c: 382: while (1)
"382
[e :U 595 ]
[; ;test.c: 383: {
"383
{
[; ;test.c: 384: First_Line();
"384
[e ( _First_Line ..  ]
[; ;test.c: 385: Second_Line();
"385
[e ( _Second_Line ..  ]
[; ;test.c: 386: Third_Line();
"386
[e ( _Third_Line ..  ]
[; ;test.c: 387: Fourth_Line();
"387
[e ( _Fourth_Line ..  ]
"388
}
[e :U 594 ]
"382
[e $U 595  ]
[e :U 596 ]
[; ;test.c: 388: }
[; ;test.c: 389: }
"389
[e :UE 593 ]
}